Bulletin of the American Physical Society
APS March Meeting 2023
Volume 68, Number 3
Las Vegas, Nevada (March 5-10)
Virtual (March 20-22); Time Zone: Pacific Time
Session S74: Semiconducting Qubits IIFocus
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Sponsoring Units: DQI Chair: Ferdinand Kuemmeth, Niels Bohr Institute, University of Copenhagen Room: Room 403/404 |
Thursday, March 9, 2023 8:00AM - 8:36AM |
S74.00001: Quantum computation with hole spin qubits in Si and Ge quantum dots. Invited Speaker: Stefano Bosco Hole spin qubits in silicon and germanium quantum dots are promising platforms for quantum computing because of their large spin-orbit interactions, permitting efficient and ultrafast all-electric qubit control. |
Thursday, March 9, 2023 8:36AM - 8:48AM |
S74.00002: Influence of charge noise on foundry-fabricated spin qubit Victor El-Homsy, Bernhard Klemt, Vivien Thiney, Renan Lethiecq, Cameron Spence, Bruna Cardoso-Paz, Emmanuel Chanrion, David J Niegemann, Pierre A Mortemousque, Baptiste Jadot, Benoit Bertrand, Heimanu Niebojewski, Christopher Bäuerle, Maud Vinet, Yann-Michel Niquet, Tristan Meunier, Matias Urdampilleta Semiconductor quantum dots represent a promising platform for quantum information processing [1]. Among the various technologies belonging to this category, silicon has low-spin-orbit interaction, and can be purified into its zero nuclear spin isotopes. Electron spins in silicon therefore stand out as potential qubits given their long coherence times and demonstrated fault-tolerant single qubit operations [2]. In this context, quantum dots (QDs) formed in CMOS classical electronics offer a path towards scalable quantum computing, by leveraging industrial fabrication foundries [3], and potentially make reliable spin qubits |
Thursday, March 9, 2023 8:48AM - 9:00AM |
S74.00003: Si/SiGe quantum devices with full 300mm process Clement Godfrin, Asser Elsayed, Mohamed Shehata, Ruoyu Li, George Simion, Stefan Kubicek, Shana Massar, Yann Canvel, Julien Jussot, Roger Loo, Andriy Hikavyy, Massimo Mongillo, Danny Wan, Kristiaan De Greve Spin qubits in silicon have been considered as one of the most promising candidates for large scale quantum computers due to their long coherence, high-fidelity and compatibility with CMOS technology.? In Si/SiGe devices, the electrons are confined at the high-quality crystalline interface, which reduces potential disorders and decreases charge noises, making it a very promising platform for qubit array up-scaling. However, some challenges remain with the SiGe hetero-structure, among which higher trapping density at the upper SiGe interface, crystalline dislocation, low valley-splitting. |
Thursday, March 9, 2023 9:00AM - 9:12AM |
S74.00004: Temperature scaling of spin qubit performance in Si/SiGe quantum dots Oriol Pietx-Casas, Eline Raymenants, Brennan Undseth, Lieven M Vandersypen, Giordano Scappucci, Mateusz T Madzik, Stephan G Philips, Sergey V Amitonov, Amir Sammak Gate-based accumulation devices for quantum information processing are usually operated in the 20mK regime, where charge noise is minimized and phonon processes are almost negligible. In recent years, operation at higher temperatures has gained interest in the community since operating at >1.6K unlocks simpler and more powerful cooling systems, ideal for co-integration with the necessary control electronics. We present the performance of our standard 28Si/SiGe devices [1] as the temperature is increased, a platform yet to be shown at higher temperatures. We report the effects of temperature on single-qubit timescales (T1, T2*, T2H, T2CPMG) and during PSB readout. Additionally, we measure noise at the sensors and qubits. We inspect the temperature response in the 200mK – 850mK regime, limited by readout visibility. Results across the qubit array show: (i) T1 scaling better behaved than [2] predicts, (ii) T2* almost flat, with temperature increase and (iii) whitening of the noise spectrum at high frequencies. All in all the device shows remarkable prospects for temperature scaling, especially considering that the heterostructure is not optimized for these temperatures. |
Thursday, March 9, 2023 9:12AM - 9:24AM |
S74.00005: Heating effects and frequency shifts in a six-qubit Si/SiGe quantum processor Brennan Undseth, Oriol Pietx-Casas, Eline Raymenants, Mohammad Mehmandoost, Mateusz T M?dzik, Stephan G Philips, Sergey V Amitonov, Sander L de Snoo, Larysa Tryputen, Amir Sammak, Giordano Scappucci, Lieven M Vandersypen As spin-based quantum processors grow in size and complexity, maintaining high fidelities and minimizing crosstalk will be essential for the successful implementation of quantum algorithms and error-correction protocols. In particular, recent experiments have highlighted pernicious transient qubit frequency shifts associated with microwave qubit control. Workarounds for small devices, including pre-pulsing with an off-resonant microwave burst to bring a device to a steady-state, wait times prior to measurement, and qubit-specific calibrations all bode ill for device scalability. Here, we make substantial progress in understanding and overcoming this effect. First, in a six-qubit silicon quantum processor, we report a surprising non-monotonic relation between device temperature and qubit frequency, with frequency shifts of a similar magnitude as those induced by microwave driving. Possible mechanisms are discussed. Second, we evaluate the robustness of rf-reflectometry in the context of heating. Last, we find a pragmatic solution to the heating effect: raising the device operating temperature to about 200 mK. We show this leads to stable qubit frequencies and eliminates the need for pre-pulsing and wait times without compromising qubit coherence. |
Thursday, March 9, 2023 9:24AM - 9:36AM |
S74.00006: An analysis of spin orbit effects on spin dependent tunnel coupling and g-factor tuning in double quantum dots Arthur Lin, Garnett W Bryant Self-assembled quantum dots have been sought as semiconductor qubit architecture due to their optical addressability and electrical tunability. Double dot systems have the additional tunability of electrically biasing the two dots in and out of energetic resonance. During resonance, the tunnel coupling strength between the two dots depends on the orientation of the spin state, which, in turn, modifies the effective g-factor of the states. The physical mechanism driving spin-dependent tunneling and the change in effective g-factor has not been well studied. We present results obtained with an atomistic tight-binding model and perturbative analysis of the tight-binding wavefunctions to show that the change in g-factor during resonance arises solely from inclusion of the Peierls contribution. In contrast, the other two magnetic field terms, namely, the spin and atomic orbital contributions do not contribute to the resonance behavior of the g-factor or exhibit and other resonance behavior. Additionally, we contrast electron and holes states, with and without spin-orbit terms in the Hamiltonian, to demonstrate the spin-orbit nature of resonance g-factor tuning. |
Thursday, March 9, 2023 9:36AM - 9:48AM |
S74.00007: Integrating Si/SiGe quantum devices with on-chip classical circuitry Michael Wolfe, Thomas W McJunkin, Daniel R Ward, Deanna M Campbell, Lisa A Tracy, Mark Friesen, Mark A Eriksson The rapid acceleration of quantum computing technologies is poised to reach an interconnect bottleneck, where the qubit count in a quantum processor is limited by the number of input-output (I/O) connections. We demonstrate the operation of an on-chip classical multiplexer on an array of Si/SiGe quantum Hall devices that reduces the I/O connections on the chip by nearly ten fold, with a Rent exponent p = 0. We use the Hall devices to characterize the performance of the integrated switches at 2K and high magnetic fields. We measure the signal bandwidth through the multiplexing circuit and discuss a protocol for multiplexed charge-sensing readout of quantum-dot qubits equipped with this technology. We discuss the impact of the finite bandwidth on single-shot readout fidelity for an array of N quantum dot charge sensors. |
Thursday, March 9, 2023 9:48AM - 10:00AM |
S74.00008: Coherent Conveyor Mode Shuttling of Electrons and their Spin Tom Struck, Lino Visser, Ran Xue, Hendrik Bluhm, Lars Schreiber One- and two-qubit manipulation fidelity has been increased to the point at which quantum error correction is possible, if the qubit platform becomes scalable. |
Thursday, March 9, 2023 10:00AM - 10:12AM |
S74.00009: A scalable spin-shuttling architecture for Si/SiGe-based quantum computing Alexander Willmes, Matthias Künne, Harsh Bhardwaj, Max Oberländer, Julian Teske, Ran Xue, Inga Seidler, Eugen Kammerloher, Lars Schreiber, Hendrik Bluhm Si/SiGe spin-qubits recently achieved operational fidelities above the error threshold for quantum error correction schemes, shifting the focus to increasing qubit numbers. A viable architecture for a quantum processor needs to provide solutions for scaling-up in two dimensions while providing enough space for control lines and potentially locally integrated control electronics. |
Thursday, March 9, 2023 10:12AM - 10:24AM |
S74.00010: Impact of phonons on Si/SiGe spin qubits Rex O Lundgren, Matthew Brooks, Charles Tahan We theoretically investigate how phonons impact the fidelities of semiconductor spin qubit gate operations as a function of several parameters, including temperature, confinement length, and interdot distance. We consider both Loss-DiVincenzo and singlet-triplet Si/SiGe spin qubits and use a master equation based approach to investigate phonon-induced errors, including leakage outside the computational subspace. Phonons generated by spin qubit readout devices also impact the fidelities of semiconductor spin qubit gate operations. Here, we theoretically explore how phonons emitted from a single electron transistor impact Loss-DiVincenzo and singlet-triplet Si/SiGe spin qubit gate operations using several analytical approaches, including Keldysh field theory. |
Thursday, March 9, 2023 10:24AM - 10:36AM |
S74.00011: Electrostatic uniformity and two-dimensional quantum dot arrays in silicon Marcel Meyer, Florian K Unseld, Corentin Déprez, Timo R van Abswoude, Dingshan Liu, Chien-An Wang, Mateusz T M?dzik, Saurabh Karwal, Stefan Oosterhout, Sergey V Amitonov, Larysa Tryputen, Francesco Borsoi, Amir Sammak, Nico Hendrickx, Giordano Scappucci, Lieven M Vandersypen, Menno Veldhorst Engineering highly uniform two-dimensional quantum dot arrays might be an essential requirement for building a scalable quantum processor based on silicon spin qubits. Here we show tuneable tunnel couplings in a silicon 2x2 quantum dot array operated in the single electron regime. In such a device we can compensate fluctuations in the electrostatic environment by applying individual gate voltages for each quantum dot. However, scaling this approach to larger arrays would lead to excessive overheads in tuning and control electronics. Therefore, we developed a method to electrically increase the potential uniformity in heterostructure quantum wells. We demonstrate that pinch-off voltages in quantum dot devices can be tuned over hundreds of millivolts and that they remain stable for hours afterward. Applying our method, we homogenize the pinch-off voltages of the plunger gates in a linear array for four quantum dots and reduce their spread by one order of magnitude. This work offers a new tool for the tuning of spin qubit devices providing perspectives for the implementation of scalable spin qubit arrays. |
Thursday, March 9, 2023 10:36AM - 10:48AM |
S74.00012: Characterization of Silicon based Charge and Spin qubits in a 22nm Commercial FD-SOI Process IMRAN BASHIR, Dirk R Leipold, Elena Blokhina, Mike Asker, Andrii Sokolov, Conor Mcgeough, Panagiotis Giounanlis, Conor Power, Xutong Wu, Dennis Andrade-Miceli, Eoghan O'Shea The monolithic integration of the semiconductor qubit array and its associated classic control circuitry manufactured in a commercial CMOS foundry process is a key enabler of a scalable quantum processor with thousands of Qubits as an alternative to superconducting structures. As a result, the highly integrated single chip solution provides greater flexibility in design space due to the simplified and seamless control interface and low thermal budget compared to a multi-chip solution where the cryogenic control and qubit substrate are placed at different temperature stages in a cryocooler. While the superiority of analog and digital signal processing of CMOS transistors in Si substrate operating at cryogenic temperatures has been established, the impact on qubit fidelity in a commercial CMOS process has to be understood. In this work, we present our latest measurement results on charge and spin qubits in a double and triple quantum dot structure fabricated in a fully depleted silicon-on-insulator (FD-SOI) process from GlobalFoundries at 3.5K. Based on those results, broader projections and implications on qubit technology and the viability of quantum error correction will be discussed. |
Thursday, March 9, 2023 10:48AM - 11:00AM |
S74.00013: Semiconducting qubits with embedded control and readout cryo-CMOS circuits Baptiste Jadot, Marcos Zurita, Gérard Billiot, Yvain Thonnart, Loïck Le Guevel, Mathieu Darnas, Candice Thomas, Jean Charbonnier, Tristan Meunier, Maud Vinet, Franck Badets, Gaël Pillonnet The scaling of quantum nanoprocessors requires the development of integrated electronics as close as possible of the quantum chips. In this context, electron spin qubits in semiconductors have been identified as a promising platform due to both its long coherence time and the possibility to leverage the well-established fabrication of microelectronic foundries for Si based quantum devices. Their direct compatibility with CMOS electronics would enable a co-integration in a compact manner of quantum devices and control electronics. Studying the compatibility between these two fields is necessary to increase the size of quantum computing arrays beyond a few qubits and solve the connectivity bottleneck. |
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