A scalable spin-shuttling architecture for Si/SiGe-based quantum computing

Si/SiGe spin-qubits recently achieved operational fidelities above the error threshold for quantum error correction schemes, shifting the focus to increasing qubit numbers. A viable architecture for a quantum processor needs to provide solutions for scaling-up in two dimensions while providing enough space for control lines and potentially locally integrated control electronics.

I present an architecture proposal based on shuttling electrons over micron-scale distances [1,2] allowing for beyond next-neighbor coupling, low crosstalk, small operational frequencies and reduced magnetic field gradients, which leads to better coherence.

For this purpose I show detailed device simulations for the Si/SiGe platform of all relevant operations and components using realistic device parameters, provide estimates for operation fidelities and validate the producibility by providing realistic layouts compatible with state-of-the-art industrial fabrication technologies.

Assuming that electrons can be shuttled over several microns with high spin coherence, our architecture bridges the gap between conceptual propsals and device fabrication while optimizing operational performance, thus paving the way for a scalable Si/SiGe-based quantum processor.

[1] Seidler et al. Conveyor-mode single-electron shuttling in Si/SiGe for a scalable quantum computing architecture. npj Quantum Inf. 8, 100 (2022)

[2]  Langrock, V. et al. Blueprint of a scalable spin qubit shuttling device for coherent mid-range qubit transfer in disordered Si/SiGe/SiO2. Preprint at https://arxiv.org/abs/2202.11793 (2022)