Session A6: Novel Channel Materials for CMOS Technology

III-V MOSFETs: From Materials {\&} Physics to Devices

Gallium-Arsenide metal-oxide-semiconductor field-effect-transistors (MOSFET) have finally been demonstrated with performance metrics matching the predictions of semiconductor device models. Recent discoveries and inventions in many areas including materials and fabrication, semiconductor physics, interface chemistry, semiconductor interface analysis, and semiconductor device design and process have contributed to this success. In my invited talk, I will review some select areas including the unique properties of interfaces formed between Ga$_{2}$O molecules and a GaAs surface, a high permittivity ($\kappa \quad \cong $ 20) GdGaO/Ga$_{2}$O$_{3}$ dielectric stack providing both a device quality interface and band-offsets on GaAs required for MOSFET operation, a semiconductor heterostructure for mitigation of high band-edge interface-state density, and device design criteria for high electron channel mobility and MOSFET drive current. Performance metrics of present metal-gate GaAs enhancement-mode MOSFETs such as electron channel mobility, drive current, transconductance, and threshold voltage will be discussed. GaAs MOSFETs with In$_{0.3}$Ga$_{0.7}$As channel layers exhibit typical electron peak mobilities exceeding 5,000 cm$^{2}$/Vs, an improvement of a factor of 20 over silicon based high-$\kappa $ metal-gate inversion-mode MOSFETs. Even higher electron mobilities surpassing 12,000 cm$^{2}$/Vs have been measured in In$_{0.75}$Ga$_{0.25}$As channel layers. Beside the use of channel materials such as In$_{x}$Ga$_{1-x}$As with high bulk electron mobility, the physics of device operation is distinctively different from silicon inversion-mode MOSFETs. III-V MOSFET are now considered an option for CMOS based circuitry beyond the 22 nm node of the International Technology Roadmap for Semiconductors. High channel mobilities and the first successful implantation of III-V MOSFETs seem to justify such contemplation, however, many obstacles remain.   

Stability of Metal Oxide/Ge and Metal Oxide/III-V Interfaces and Implications for Low Defect Density MOS Devices

The need to achieve high performance in MOS transistors as they scale to their ultimate size limits prompts interest in channel materials, such as Ge and III-V compound semiconductors, which exhibit larger intrinsic carrier mobilities than Si. Given the need to reduce gate leakage current density while maintaining electrostatic control of the devices, it is necessary to deposit high-k gate dielectrics onto these novel channel materials. Unlike silicon, high mobility channel materials do not form a highly-stable and stoichiometric native oxide; therefore, control of the state of oxidation at the metal oxide dielectric/channel interface during and after gate dielectric deposition is essential. This presentation will summarize findings reported to date on 1) chemical stability of Ge and III-V surfaces in the presence of oxygen and 2) oxide/channel defect formation and passivation. New results on pre-high-k chemical surface preparation, structural modification during metal oxide deposition and the resulting effects on MOS capacitor and transistor characteristics will also be presented, with emphasis on Al$_{2}$O$_{3}$ and HfO$_{2}$ gate insulators grown by atomic layer deposition onto Ge and InGaAs channels. \textit{In situ} and \textit{ex situ} monitoring of chemical bonding at the gate insulator/channel interface by photoelectron spectroscopy will be correlated with the D$_{it}$, fixed charge and charge trapping behavior of MOS devices.   

Dangling-bond defects and hydrogen passivation in germanium

The application of germanium in complementary metal-oxide semiconductor (CMOS) technology is hampered by high interface-state densities, the microscopic origin of which has remained elusive. Using first-principles calculations, we have investigated the atomic and electronic structure of prototype germanium dangling-bond defects [1]. The computational approach is based on density functional theory, and in order to overcome band-gap problems we have also performed quasiparticle calculations based on the GW approach. Surprisingly, the germanium dangling bonds give rise to electronic levels below the valence-band maximum. They therefore occur exclusively in the negative charge state, explaining why they have eluded observation with electron spin resonance. The associated fixed charge is likely responsible for threshold-voltage shifts and poor performance of n-channel transistors. At silicon/silicon dioxide interfaces, hydrogen is successfully used to passivate dangling-bond defects. We have therefore also investigated the interaction of hydrogen with germanium. In contrast to silicon and other semiconductors in which hydrogen behaves as an amphoteric impurity, interstitial hydrogen in germanium is stable only in the negative charge state, i.e., it behaves exclusively as an acceptor. Passivation of dangling bonds by hydrogen will therefore be ineffective, again explaining experimental observations. Other cases where unusual interfacial defects and problems with hydrogen passivation may occur will be discussed. \\ \\ Work performed in collaboration with A. Janotti, P. Rinke, and C. G. Van de Walle, and supported by the Semiconductor Research Corporation. \\ \\ 1. J. R. Weber, A. Janotti, P. Rinke, and C. G. Van de Walle, Appl. Phys. Lett. 91, 142101 (2007).   

Scanning-tunneling microscopy and spectroscopy of oxide deposition on III-V semiconductor surfaces

The correlation between the atomic bonding structure and the electronic structure at oxide-semiconductor interfaces is critical to understanding how atomic scale changes in electronic structure can cause localization of electrons or holes at these interfaces. All logic devices function by having an electric field perturb the electronic structure of a semiconductor to change its resistance thereby activating the device. The key material in this process is the interface between the gate oxide and the semiconductor. Any fixed charge or defects which trap electrons or holes destroy the device operation because the electric field will be terminated by interface charges instead of being transmitted into the semiconductor where the electrons or holes are conducted. We have used atomically resolved scanning tunneling microscopy (STM) images and scanning tunneling spectra (STS) to determine the atomic and electronic structure at the gate-oxide semiconductor interface. Our research focuses upon the group III-V semiconductors (GaAs, InGaAs, InAs) since they offer electron speeds up to 30x greater than silicon as well as germanium since it offers 3x higher hole speeds than silicon. In general, electronically passive interfaces are formed when oxide deposition does not disrupt the semiconductor lattice but instead restores the semiconductor surface atoms back to more bulk-like electronic structure. Even in the absence of a lattice disruption, oxide deposition can create new states in the bandgap thereby pinning the Fermi level by two mechanisms: direct (the adsorbate induced states in the bandgap region) and/or indirect (generation of undimerized surface atoms).