Session G52: Quantum Circuit Compilation and Synthesis

Oral: Optimizing Quantum Circuits Consisting of Millions of Gates

Quantum circuit optimization is a hard problem and at the same time necessary for executing real quantum computations. In order to become practical, quantum circuit optimization has to reach the performance of classic VLSI logic synthesis. Various heuristic-based methods have been proposed to tackle quantum circuit optimisation, but none seems to be applicable to large-scale circuits. Herein, we bridge the performance gap and present a method and the tools for optimizing very large-scale quantum circuits. We exploit the efficiency of Relational Database Management Systems and perform thousands of quantum circuit optimization steps per second. We benchmark our method on both synthetic and practical circuits, including quantum signal processing, and show numerical evidence of its speed and scalability. We expect for our method to be an integral part of the next generation quantum software.   

Synthesizing Quantum-Circuit Optimizers

Near-term quantum computers are expected to work in an environment where each operation is noisy, with no error correction. Therefore, quantum-circuit optimizers are applied to minimize the number of noisy operations. Today, physicists are constantly experimenting with novel devices and architectures. For every new physical substrate and for every modification of a quantum computer, we need to modify or rewrite major pieces of the optimizer to run successful experiments. Prior work uses manually derived or domain specific optimizations, which require experts to discover and verify. This work presents QUESO, an efficient approach for automatically synthesizing a quantum-circuit optimizer for a given quantum device. For instance, in 1.2 minutes, QUESO can synthesize an optimizer with high-probability correctness guarantees for IBM computers that significantly outperforms leading compilers, such as IBM's Qiskit and TKET, on the majority (85%) of the circuits in a diverse benchmark suite.   

Choosing an Optimal Pass Set for Quantum Transpilation

In order to increase the fidelity of quantum programs running on NISQ devices, a variety of optimizations have been proposed.  These optimizations are usually incorporated into a quantum transpiler as passes. Popular transpilers such as IBM Qiskit, and Google Cirq make use of these extensively.

However, choosing the right set of transpiler passes and the right configuration for each pass is a challenging problem.

Transpilers often make critical decisions using heuristics since the ideal choices are impossible to identify without knowing the target application outcome. Further, the transpiler also makes simplifying assumptions about device noise that often do not hold in the real world. As a result, we often see counter-intuitive effects where the fidelity of a target application decreases despite using state-of-the-art optimizations or a combination of them.

To overcome this challenge, we propose OPTRAN, a framework for  Choosing an Optimal Pass Set for Quantum Transpilation. OPTRAN uses efficiently classically simulable quantum circuits, that resemble the target application, to estimate how different transpiler passes interact with each other in the context of the target application. OPTRAN then uses this information to choose the optimal combination of passes that maximizes the target application's fidelity when run on the actual device. Our experiments on IBM machines show that OPTRAN 

achieves by 88.68% of the maximum possible fidelity, (a 4.31x improvement over IBM-Qiskit's baseline). We also propose low-cost variants of OPTRAN, called OPTRAN-E-3 and OPTRAN-E-1 that improve fidelity by 70% and 61% of the maximum permissible limit at a 58% and 69% reduction in cost compared to OPTRAN respectively.   

Qubit Mapping and Routing via MaxSAT

Near-term quantum computers will operate in a noisy environment, without error correction. A critical problem for near-term quantum computing is laying out a logical circuit onto a physical device with limited connectivity between qubits. This is known as qubit mapping and routing (QMR), an intractable combinatorial problem. It is important to solve QMR as optimally as possible to reduce the amount of added noise, which may render a quantum computation useless. In this work, we develop a novel approach for optimally solving the QMR problem via a reduction to the maximum satisfiability problem (MAXSAT). Additionally, we present two novel relaxation ideas that shrink the size of the MAXSAT constraints by exploiting the structure of a quantum circuit. The first relaxation slices the circuit horizontally into a number of consecutive subcircuits and solves a set of smaller MAXSAT problems for each of them. The second relaxation allows for efficient mapping of cyclic circuits, like in quantum approximate optimization algorithms (QAOA). Cyclic circuits are those where the same subcircuit is repeated more than once. Instead of generating one large set of constraints for the entire circuit, we solve a special set of MAXSAT constraints only for the repeated subcircuit in isolation, and then stitch the subcircuits back together to generate a mapping for the entire circuit. Our thorough empirical evaluation demonstrates (1) the scalability of our approach compared to state-of-the-art optimal QMR techniques, (2) the significant cost reduction compared to state-of-the-art heuristic approaches, and (3) the power of our proposed constraint relaxations.   

Multi-mode Cavity Centric Architectures for Quantum Simulation

Quantum Simulation is an algorithm of interest, however current devices are yet to surpass classical techniques. For problems of interest, large degrees of entanglement are required. Another challenge is that qubits sit idle whilst alternating terms are implemented. 2D planar superconducting are hindered by their nearest neighbor topology and short lifespan. One technology of interest is the multi-mode superconducting resonator. We observe that these cavities have a natural topology that aligns well with quantum simulation, and exhibit longer lifespans in comparison to other superconducting hardware. We discuss the integration of these devices and their implications to quantum simulation. We report the development of a transpiler for quantum simulation, leading to reductions of up to 82% in circuit depths. Additionally, our investigation demonstrates improvements of up to 19.4% in results from Variational Quantum Algorithms.   

Efficient quantum gate decomposition via adaptive circuit compression

We report on a novel quantum gate approximation algorithm based on the application of parametric two-qubit gates in the synthesis process. The utilization of these parametric two-qubit gates in the circuit design allows us to transform the discrete combinatorial problem of circuit synthesis into an optimization problem over continuous variables. The circuit is then compressed by a sequential removal of two-qubit gates from the design, while the remaining building blocks are continuously adapted to the reduced gate structure by iterated learning cycles. We implemented the developed algorithm in the SQUANDER software package and benchmarked it against several state-of-the-art quantum gate synthesis tools. Our numerical experiments revealed outstanding circuit compression capabilities of our compilation algorithm providing the most optimal gate count in the majority of the addressed quantum circuits.   

QFactor: A Domain-Specific Optimizer for Quantum Circuit Instantiation

We introduce a domain-specific algorithm for numerical optimization operations used by quantum circuit instantiation, synthesis, and compilation methods. QFactor uses a tensor network formulation together with analytic methods and an iterative local optimization algorithm to reduce the number of problem parameters. Besides tailoring the optimization process, the formulation is amenable to portable parallelization across CPU and GPU architectures, which is usually challenging in general purpose optimizers (GPO). Compared with several GPOs, our algorithm achieves exponential memory and performance savings with similar optimization success rates. While GPOs can handle directly circuits of up to six qubits, QFactor can process circuits with more than 12 qubits. Within the BQSKit optimization framework, we enable optimizations of 100+ qubit circuits using gate deletion algorithms to scale out linearly with the hardware resources allocated for compilation in GPU environments.   

Introducing Hardware Awareness to PCOAST Synthesis

The Pauli-based Circuit Optimization Analysis and Synthesis Toolchain (PCOAST) was recently introduced as a method for the optimization of quantum circuits and implemented as the primary optimization method in the Intel® Quantum Software Development Kit. Though PCOAST includes optimizations on the PCOAST graph representation, the highly efficient outcomes are primarily due to the PCOAST circuit synthesis of the graph. However, PCOAST synthesis as originally introduced is agnostic to hardware constraints such as limited connectivity or faulty gates. In this talk, we discuss the extension of PCOAST synthesis to include constraints by extending the definitions of the synthesis search functions. We adapt common graph-based data structures to choose among the limited set of two-qubit gates when they are generated. This avoids costly SWAPs by leveraging a better realization of arbitrary Pauli operator nodes in the context of the whole circuit as well as the hardware. We also argue that the algorithmic complexity of hardware awareness is on par with PCOAST synthesis without it.   

Routing quantum circuits with AlphaZero deep exploration (Part 1/2)

Compiling a quantum circuit for specific quantum hardware is a challenging problem, since current quantum processing units (QPUs) generally have low connectivity between physical qubits and limited coherence time. To make optimal use of these constrained resources and to ensure that the quantum circuit is executable on the target QPU, a circuit-transformation process with low depth overhead is essential. Due to the large search space for such circuit transformations, coupled with a high branching factor, the majority of existing algorithms tend to conduct only superficial searches, often resulting in solutions that are at best locally optimal. We propose an AlphaZero-inspired algorithm for systematically averting this limitation.

In this first part of the talk, we describe how our method combines two influential frameworks: firstly, utilizing a transformer network trained via Monte Carlo tree search (MCTS) to propose mappings at each layer of the quantum circuit, and secondly, integrating a routing method relying on graph matchings. This hybrid approach ensures strategic mappings while guaranteeing consistent and deterministic routing via recognized algorithms.   

Routing quantum circuits with AlphaZero deep exploration (Part 2/2)

Compiling a quantum circuit for specific quantum hardware is a challenging problem, since current quantum processing units (QPUs) generally have low connectivity between physical qubits and limited coherence time. To make optimal use of these constrained resources and to ensure that the quantum circuit is executable on the target QPU, a circuit-transformation process with low depth overhead is essential. Due to the large search space for such circuit transformations, coupled with a high branching factor, the majority of existing algorithms tend to conduct only superficial searches, often resulting in solutions that are at best locally optimal. We propose an AlphaZero-inspired algorithm for systematically averting this limitation.

In this second part of the talk, we describe how our method employs a transformer neural network in conjunction with deep lookahead in a guided tree search, which allows for searching deeper and attempting to find better solutions than existing algorithms do. Using the transformer architecture in combination with graph neural networks, our algorithm is hardware-agnostic. We present benchmarks of our method compared to other algorithms.   

Model-Based Reinforcement Learning for Quantum Circuit Synthesis

Quantum circuit synthesis is a compilation primitive that constructs implementations of algorithms based on functional descriptions. These tools can discover new implementations of algorithms and are powerful circuit optimizers. The run time required to synthesize quantum circuits grows exponentially with the number of qubits. Much of this run time is used to search for parameterized circuit templates or ansatzes that define the structure of the synthesized circuit. Past work has shown how Machine Learning (ML) can be used to accelerate this process by providing seed circuits from which to start synthesis. This work addresses scalability issues present in this previous work. Instead of enumerating possible output circuits, this work demonstrates how techniques in generative ML can be used to produce seed circuit templates.