Bulletin of the American Physical Society
APS March Meeting 2019
Volume 64, Number 2
Monday–Friday, March 4–8, 2019; Boston, Massachusetts
Session Y29: Semiconducting Qubits: Automation of Tune-up
11:15 AM–2:15 PM,
Friday, March 8, 2019
BCEC
Room: 162A
Sponsoring
Unit:
DQI
Chair: Natalia Ares
Abstract: Y29.00003 : Electron shuttling based error-correction architectures using quantum dot qubits*
11:39 AM–11:51 AM
Presenter:
Veit Langrock
(Institute for Theoretical Nanoelectronics (PGI-2), JARA-FIT Institute for Quantum Information, FZ Jülich, Germany)
Authors:
Veit Langrock
(Institute for Theoretical Nanoelectronics (PGI-2), JARA-FIT Institute for Quantum Information, FZ Jülich, Germany)
David Peter DiVincenzo
(Institute for Theoretical Nanoelectronics (PGI-2), JARA-FIT Institute for Quantum Information, FZ Jülich, Germany)
The inherent dot mobility provided by the conceptual ease of electron shuttling in such gate-defined systems is a powerful resource which has been incorporated as a vital component in proposals for fault-tolerant spin-qubit architectures [2,3], with the assumption that such operations can be realized with very high fidelity and on relatively short time scales.
We address the issue of decoherence for such shuttling devices and present a possible realization of a scalable fault-tolerant quantum memory based on more realistic device models.
[1] D. Loss and D. P. DiVincenzo, Physical Review A 57, 120 (1998).
[2] J. M. Taylor et al., Nature Physics 1, 177 (2005).
[3] R. Li et al., Science Advances 4, eaar3960 (2018).
*VL acknowledges support from Helmholtz IVF grant 'Scalable solid state quantum computing'.
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