Increasing reliability for 3D integrated high-coherence superconducting qubits*

As designs for superconducting qubits become more complex, 3D integration of two or more vertically bonded chips can enable increased density and connectivity. Precise control of the spacing between these chips is required to give designers accurate parameters to plan and predict circuit performance. In this talk, we will describe our process for using silicon hard-stop mesas to control chip spacing and tilt, and our integration of these features with our high-coherence superconducting qubit fabrication process.