Idle tomography: Efficient gate characterization for N-qubit processors*

Quantum process tomography is famously unscalable to many qubits. But the problem is actually the size of the model — arbitrary N-qubit process matrices — rather than the number of qubits. The vast majority of possible N-qubit errors will not occur in real processors. Here, we introduce a concrete reduced model of low-weight (few-qubit) errors on N qubits. It has O(N²) parameters, and captures all the commonly conceived failure modes. Then, we introduce a simple and transparent tomography protocol for measuring the error rates, whose complexity scales very efficiently with N. We demonstrate it with simulations and experimental results.