Bulletin of the American Physical Society
APS March Meeting 2018
Volume 63, Number 1
Monday–Friday, March 5–9, 2018; Los Angeles, California
Session R33: Superconducting Circuits: Design and Packaging
8:00 AM–11:00 AM,
Thursday, March 8, 2018
LACC
Room: 408B
Sponsoring
Unit:
DQI
Chair: Matteo Mariantoni, University of Waterloo
Abstract ID: BAPS.2018.MAR.R33.2
Abstract: R33.00002 : Flip Chip Packaging for Superconducting Quantum Computers
8:36 AM–8:48 AM
Presenter:
Adel Elsherbini
(Components Research, Intel Corporation)
Authors:
Adel Elsherbini
(Components Research, Intel Corporation)
Javier Falcon
(Assembly Technology Test and Development, Intel Corporation)
Jeanette Roberts
(Components Research, Intel Corporation)
Roman Caudillo
(Components Research, Intel Corporation)
Stefano Poletto
(Kavli Institute of Nanoscience Delft, Delft University of Technology)
Ye Seul Nam
(Assembly Technology Test and Development, Intel Corporation)
David Michalak
(Components Research, Intel Corporation)
Lester Lampert
(Components Research, Intel Corporation)
Zachary Yoscovits
(Components Research, Intel Corporation)
Joe Saucedo
(Assembly Technology Test and Development, Intel Corporation)
Alessandro Bruno
(Kavli Institute of Nanoscience Delft, Delft University of Technology)
James Clarke
(Components Research, Intel Corporation)
Leonardo DiCarlo
(Kavli Institute of Nanoscience Delft, Delft University of Technology)
Superconducting quantum processors are among the most promising qubit technologies currently being investigated. They offer fast gate speeds, repeatable manufacturability and control. However, one of the major challenges is packaging the superconducting chip to enable reliable connection to the higher temperature control electronics while not impacting the qubit performance. Common interconnect technologies being used such as wirebonding and spring loaded pins suffer from scaling limitations for larger number of qubits. We will discuss the electrical, mechanical and thermal challenges associated with enabling flip chip packaging for superconducting quantum computing. The package design was verified on internally fabricated 5-qubit and 7-qubit surface code quantum chip and showed comparable coherence times to wirebonded packages while enabling orders of magnitude increase in the number of connections in and out of the die and significantly improved microwave cross talk and spurious modes suppression.
To cite this abstract, use the following reference: http://meetings.aps.org/link/BAPS.2018.MAR.R33.2
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