Bulletin of the American Physical Society
APS March Meeting 2018
Volume 63, Number 1
Monday–Friday, March 5–9, 2018; Los Angeles, California
Session F22: Spin Transport, Spin Logic and Spin Memories
11:15 AM–2:15 PM,
Tuesday, March 6, 2018
LACC
Room: 402A
Sponsoring
Units:
GMAG DMP FIAP
Chair: Alina DEAC, Helmholtz-Zentrum Dresden-Rossendorf
Abstract ID: BAPS.2018.MAR.F22.10
Abstract: F22.00010 : How nanosecond magnetization dynamics during spin-Hall switching of in-plane MTJs enables a cryogenic memory cell with superconducting line drivers*
1:03 PM–1:39 PM
Presenter:
Graham Rowlands
(Raytheon BBN Technologies)
Authors:
Graham Rowlands
(Raytheon BBN Technologies)
Emily Toomey
(Massachusetts Institute of Technology)
Andrew Wagner
(Raytheon BBN Technologies)
Guilhem Ribeill
(Raytheon BBN Technologies)
Leonardo Ranzani
(Raytheon BBN Technologies)
Minh-Hai Nguyen
(Cornell University)
Shengjie Shi
(Cornell University)
Sriharsha Aradhya
(Cornell University)
Andrew Dane
(Massachusetts Institute of Technology)
Karl Berggren
(Massachusetts Institute of Technology)
Robert Buhrman
(Cornell University)
Thomas Ohki
(Raytheon BBN Technologies)
The preservation of these switching characteristics makes SHE memories a perfect candidate for integration with low temperature computing schemes. One such scheme, based on single-flux-quantum (SFQ) operation of Josephson-Junction (JJ) circuits, could reduce the enormous power consumption of today’s large-scale computing facilities. This technology has historically lacked a robust and dense memory, such as the SHE three terminal devices, that can be operated at low temperatures.
Here we demonstrate the operation of a memory cell that can be interfaced directly to SFQ logic. The amplitudes of SFQ pulses are insufficient to directly enact switching, so we must instead implement a line driver that can be triggered by SFQ pulses. Advances in SHE materials have brought write currents to around 120 μA, while further advances coupled with device scaling should yield currents an order of magnitude lower. Such currents are easily sourced by superconducting nano-cryotrons (nTrons), which replace access transistors in our cryogenic memory architecture. We show bipolar switching of SHE memory elements with nTrons devices at T=4 K, taking the first steps on the way to an SFQ-compatible main memory.
*The work was partially supported by IARPA and SPAWAR Contract N66001-12-C-2019.
To cite this abstract, use the following reference: http://meetings.aps.org/link/BAPS.2018.MAR.F22.10
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