Efficient gate set tomography on a multi-qubit superconducting processor*

Quantum information processors with five or more qubits are becoming common.  Complete, predictive characterization of such devices — e.g. via any form of tomography, including gate set tomography — appears impossible because the parameter space is intractably large.  Randomized benchmarking scales well, but cannot predict device behavior or diagnose failure modes.  We introduce a new type of gate set tomography that uses an efficient ansatz to model physically plausible errors, but scales polynomially with the number of qubits.  We will describe the theory behind this multi-qubit tomography and present experimental results from using it to characterize a multi-qubit processor made by Rigetti Quantum Computing.