Energy dissipation of nanotransistors formed at the LaAlO$_{3}$/SrTiO$_{3}$ interface*

Nanoscale control of the metal-insulator transition at the interface between LaAlO$_{3}$ and SrTiO$_{3}$ can be used to create transistors with dimensions below projected limits for CMOS.\footnote{C. Cen, S. Thiel, K. E. Andersen, C. S. Hellberg, J. Mannhart, and J. Levy, Nature Materials \textbf{7}, 2136 (2008).}\footnote{C. Cen, S. Thiel, J. Mannhart, and J. Levy, Science \textbf{323}, 1026 (2009).} In order to help determine the scalability of such transistors, we are attempting to characterize the dissipation mechanisms in transistor designs. Such a determination must distinguish power dissipated by the transistor from power dissipated in the oxide nanowire leads. We discuss noise cross correlation measurements designed to elucidate the mechanism for transistor switching, and attempt to quantify dissipation mechanisms during switching.