2007 APS March Meeting
Volume 52, Number 1
Monday–Friday, March 5–9, 2007;
Denver, Colorado
Session N19: Focus Session: Frontiers in Electronic Structure Theory III
8:00 AM–11:00 AM,
Wednesday, March 7, 2007
Colorado Convention Center
Room: 104
Sponsoring
Units:
DCP DCOMP
Chair: Peter Gill, Australian National University
Abstract ID: BAPS.2007.MAR.N19.2
Abstract: N19.00002 : First-principles calculations of nanoscale capacitors at finite bias potential
8:36 AM–9:12 AM
Preview Abstract
Abstract
Author:
Massimiliano Stengel
(UC Santa Barbara)
When the thickness of an oxide film is reduced to few unit cells,
its dielectric properties (which are relevant, e.g., for
nonvolatile ferroelectric memories and as gate oxides in
MOSFET transistors) start to deviate from those predicted by
macroscopic models, and cannot be disentangled from the metallic
or semiconducting contacts.
One particularly important issue related to interfacial effects
is the ``dielectric dead layer'', which plagues the performance
of thin-film perovskite capacitors by substantially reducing the
effective permittivity ($\kappa$) of the active high-$\kappa$
material.
The microscopic origins of this reduced permittivity, and in
particular whether it stems from defects or from the fundamental
properties of a metal/insulator interface, are not well understood.
To address this problem from first principles, we will first show
how the macroscopic polarization (and the coupling to an external
field) can be rigorously defined for a periodic metal-insulator
heterostructure, by using techniques and ideas borrowed from
Wannier-function theory [1].
We will then demonstrate our new method by calculating
the dielectric properties of realistic SrRuO$_3$/SrTiO$_3$/SrRuO$_3$
nanocapacitors [2].
In particular, we demonstrate the existence of an intrinsic
dielectric dead layer and analyze its origin by extracting the
ionic and electronic contributions to the electrostatic screening.
We establish a correspondence between the dead layer and the
hardening of the collective SrTiO$_3$ zone-center polar modes,
and determine the influence of the electrode by repeating our
calculations for Pt/SrTiO$_3$/Pt capacitors.
Our results provide practical guidelines for minimizing the
deleterious effects of the dielectric dead layer in nanoscale
devices.
\begin{itemize}
\item[{[1]}] \underline{M. Stengel} and N. A. Spaldin, {\em
Origin of the dielectric dead layer
in nanoscale capacitors}, Nature (London) {\bf 443}, 679
(2006).\\
\item[{[2]}] \underline{M. Stengel} and N. A. Spaldin, {\em
Ab-initio theory of
metal-insulator
interfaces in a finite electric field}, cond-mat/0511042
(2005). \\
\end{itemize}
To cite this abstract, use the following reference: http://meetings.aps.org/link/BAPS.2007.MAR.N19.2