Session H17: Focus Session: Emerging Research Devices and Materials for Microelectronics Industry II

Modeling spintronic devices

Conventional spintronic devices are based on metallic magnetic multilayers which utilize the magnetic moment associated with the spin to read magnetically stored information, leading to a nonvolatility and a substantial improvement in the performance of computer hard drives and magnetic random access memories. However, these applications employ two-terminal spin valves which are of limited use for advanced functionalities appropriate for signal processing and digital logic. While semiconductor-based three-terminal devices are natural candidates for spin logic, they remain inadequately investigated and even a simple understanding of their integration with CMOS is still missing [1]. We illustrate here several basic elements for modeling spin transport in spintronic devices and propose schemes for spin injection and detection in silicon [2], as well as for spin-controlled gain [1,3]. Supported by the US ONR, DARPA, and the National Research Council. [1] I. Zutic, J. Fabian, S. Das Sarma, Rev. Mod. Phys. {\bf 76}, 323 (2004). [2] I. Zutic, J. Fabian, and S. C. Erwin, eprint: cond-mat/0412580. [3] J. Fabian and I. Zutic, Appl. Phys. Lett. {\bf 86}, 133506 (2005); Phys. Rev. B {\bf 69} 115314 (2004).   

Non-metal spintronics: study of spin-dependent transport in InSb- and InAs-based nanopatterned heterostructures

Spin-orbit interaction in semiconductor heterostructures can lead to various spin-dependent electronic transport effects without the presence of magnetic materials. Mesoscopic samples were fabricated on InSb/InAlSb and InAs/AlGaSb two-dimensional electron systems, where spin-orbit interaction is strong. In mesoscopic devices, the effects of spin-orbit interaction are not averaged out over the geometry, and lead to observable electronic properties. We experimentally demonstrate spin-split ballistic transport and the creation of fully spin-polarized electron beams using spin-dependent reflection geometries and transverse magnetic focusing geometries. Spin-dependent transport properties in the semiconductor materials are also investigated using antidot lattices. Spin-orbit interaction effects in high-mobility semiconductor devices may be utilized toward the design of novel spintronics implementations. We acknowledge NSF DMR-0094055 (JJH), DMR-0080054, DMR-0209371 (MBS).   

Novel nanopattern assisted Mn-implanted Ge for spintronic applications

Mn-Ge is one of the most promising Diluted Magnetic Semiconductors (DMS) materials as reports indicate room temperature ferromagnetism. Our investigation focuses on fabricating Mn-Ge via novel diblock copolymer patterning methods to control Mn implantation within a Ge lattice. We foresee such methods could enable consistent tailoring of Mn-Ge magnetic properties by improving uniform solubility of Mn in Ge, along with decreasing defects. Sample fabrication is based on a 20nm-scale periodic nanodot patterning Ge substrate. Ion-implantation was performed with Mn at 40KeV and with a dose of 4.0$\times $10$^{14}$/cm$^{2}$ then annealed at 400-700\r{ }C. Material characterization included XRD, SEM and TEM. XRD detected the presence of Mn$_{5}$Ge$_{3}$ and Mn$_{11}$Ge$_{8 }$phase, which is theoretical known to have a Tc near room temperature. Ferromagnetic hysteresis loops were obtained at 5K using a SQUID magnetometer ranging from -5 to 5 kOe. Samples at various annealing temperatures showed the saturation magnetization reaches an optimum value at 450\r{ }C. The difference in the temperature-dependent remnant magnetization between the implanted n-type and p-type Ge is also observed.   

Beyond CMOS -- The Semiconductor Industry's Nanoelectronics Research Initiative

The tremendously powerful scaling of transistors, that has enabled Moore's Law for the past forty years, can not continue forever. Some of the reasons, such as the atomistic nature of matter, are obvious. Others are less obvious and will be briefly reviewed before some of the potential alternatives to charge based logic will be analyzed. Such an analysis had the semiconductor industry initiate a Nanoelectronics Research Initiative. The current status of this program will be reviewed   

Nanoscale Molecular-Electronic Device Fabrication enabling Complete Chemical and Physical Characterization

The limitation of most nanoscale molecular-electronic devices is the lack of physical/chemical characterization accompanying electrical data. Such characterization is typically impossible, because the critical layers and interfaces being inaccessibly buried in the final device structure. We present new fabrication techniques that enable a range of conventional characterization tools to be employed during and after nanoscale device fabrication. These techniques include: the fabrication of atomically-flat, patterned template-stripped bottom metal electrodes with well-defined atomic structure (elucidated by UHV-STM); and the formation of a new stencil-based nanopore device geometry enabling detailed characterization of the internal nanoscale physical/chemical properties of the final devices. The combination of these techniques allows for molecular-electronic devices with lateral sizes ranging from tens of nanometers to hundreds of microns. The fabrication, characterization and electrical properties of metal/molecular-monolayer/metal devices using these techniques (including UHV-STM, AFM, SEM, XPS and IR data) will be presented.   

Carbon nanotube Y-junctions for Nanoscale Electronics

Carbon Nanotube (CNT) based electronics offer significant potential, as a nanoscale alternative to silicon based devices, for novel molecular electronics technologies. To realize truly nanoelectronic architecture, it is desirable to have a fully integrated nanotube based technology, where both devices and interconnects are based on CNTs. With this aim in mind, we report on the electrical properties of CNT based Y-junctions. The carrier delocalization and the inevitable presence of catalyst particles, introduced during growth, at the junction region induce a net charge and scattering which can be exploited in constructing electronic devices. We have assembled and electrically characterized the DC resistance and the AC impedance of several Y-junction devices$^{2}$ with possibilities for switching and transistor related applications. These experiments alert us to the vast potentialities of Y-junction devices in the development of nanoelectronic components including inverters, logic gates, and frequency mixers. An electrical impedance model of a MWNT Y-junction will be presented which will help gain an understanding of the current transport mechanisms in these nanostructures. 1. P. Bandaru et al, ``Novel electrical switching behavior and logic in carbon nanotube Y-junctions'', Nature Materials, vol. 4(9), 663-666, (2005) 2. N. Gothard, et al. ``Controlled growth of Y-junction nanotubes using Ti-doped vapor catalyst'', Nanoletters \textbf{4}, 213-217 (2004).   

Low Frequency Noise in Carbon Nanotube Field Effect Transistors

It is critical to understand the noise performance of the carbon nanotube field effect transistors (CNT-FETs) due to their ultra-small diameters and large surface to volume ratios. In the abstract, we will describe the noise study of an ambipolar CNT-FET with a negative threshold of 5V and a positive threshold of 15V. The noise power spectra densities (PSDs) are obtained for frequencies from 0.0625Hz to 10.24kHz, showing 1/f$^{\alpha }$ behavior. The exponential $\alpha $ of this 1/f$^{\alpha }$ increases from about 0.6 to 1.2 for a gate bias from -6V to -15V at a small source-drain bias (-0.1V) and this exponential gate bias dependence comes from schottky contacts, where shot noise is the dominant noise component. We also observe a greater excess 1/f noise for electron conducting than that for hole conducting, suggesting higher defect density near the CNT conduction band. The characteristics of the CNT-FET noise are different from conventional MOSFET, and thus, additional studies are needed to understanding the noise in CNT-FETs.   

Use of a Novel Fluidic Microplotter in Macroelectronics, Photonics, and Sensors

Many future applications of microelectronics will focus not on computing but on broader uses in fast flexible electronics, imaging and displays, energy, and environmental and health monitoring. Such uses will require in many cases integration on the mesoscale, and the combination of the fast microelectronics with materials that provide other benefits. One need is the deposition of a wide range of materials from the fluid state. We describe a new fluidic microplotter that enables the deposition of a wide range of materials at the 1 $\mu $m and larger scale. The dispensing depends on a novel axial ultrasonic resonance of a fluid micropipette that allows a gentle noncontact deposition of spots, lines, curves, and 3D objects with high precision and very good CV values. We will demonstrate some of the capabilities of the plotter in 1) writing patterns on MEMS membranes, 2) writing a polymer LED, 3) writing parallel lines separated by 1 $\mu $m, 4) making bioarrays with very small spots, and 5) writing polymer waveguides, and writing on Si nanomembranes that serve as the basis for very fast flexible electronics. The physical basis for the unique dispensing action in this device, as well as broader features of the plotter will be described. Potential additional applications will be discussed.   

Integration of top-down and bottom-up methods: generating templates for nanowire devices.

Self-assembly can realize spatially controlled nanostructure arrays rivaling the lithography. However, self-assembled constructs to develop nano-circuitry on the macroscopic scale remains distant but combination of lithography and self-assembly might be used for sub-20 nm feature sizes. Spatially constrained block co-polymers can be used to generate these patterns and selective removal of one component can provide `templates' to generate nanowire arrays. This work focuses on generating nm-size features across a real substrate. We use state of the art lithography to generate sub-$\mu $m features and within these generate nm sized co-polymer arrays. Spatial control is determined only by the block size of the co-polymers and not processing variables. Selective `etching' and phase enhancement techniques were used to provide depth variations across the substrate and form the `template' for nanowire development. The results of sputtering and electrochemical deposition used to fill the templates are outlined. The results demonstrate an exciting nanofabrication technique for creating high density nanowire arrays for the nanoelectronic industry.   

High Density Germanium Nanowire Assemblies: Contact Challenges, Electrical Characterization and Photoconductivity Dynamics

The conductivity and photoconductivity properties of vertically aligned germanium nanowires, within anodised aluminium oxide (AAO) templates have been characterized by C-AFM and macro-contact measurements. Contact resistance between the nanowires and metal macro-contacts was minimized by polishing and gradual etching of the AAO surface, to expose the nanowires, prior to deposition of the contacts. Conductivity data from C-AFM and macro-contact measurements were found to be comparable suggesting that both methods are inherently suitable for evaluating the electrical transport properties of encapsulated nanowires within a matrix. Photoconductivity measurements indicate a photocurrent/dark current ratio of up to 40{\%} in the Ge nanowire matrix during illumination with an Ar laser between 457 -- 514 nm. These results are significant as the ability to make good ohmic contacts to nanowires, within well defined arrays, is key for the future `bottom-up' fabrication of multi-layered device architectures for future electronic and optoelectronic devices.   

Excitonic states and carrier recombination in ZnO quantum dots

ZnO quantum dots and related Mn-doped ZnO/ZnMgO nanostructures have recently attracted significant attention as a new nano-engineered functional material for spintronic and optoelectronic applications. We have studied the carrier recombination processes in ZnO-based quantum dots both theoretically and using the photoluminescence (PL) spectroscopy in the temperature range T=8.5 K - 300 K [1]. The obtained experimental data suggest that below T = 70 K, the ultraviolet PL in ZnO quantum dots originates from recombination of the donor-acceptor pairs, while above T = 70 K it is due to recombination of the acceptor-bound excitons. The latter is in agreement with our theoretical predictions [2]. No strong inhomogeneous broadening has been observed in ultraviolet PL from ZnO quantum dots. Our results shed new light on the carrier-recombination processes in ZnO quantum dots and can be used for the ZnO nanostructure optimization for the proposed applications. The authors acknowledge the support of MARCO and its Functional Engineered Nano Architectonics (FENA) Focus Center. [1] V.A. Fonoberov, K.A. Alim, A.A. Balandin et al., Phys. Rev. B, submitted (2005); [2] V.A. Fonoberov and A.A. Balandin, Phys. Rev. B 70, 195410 (2004); Appl. Phys. Lett. 85, 5971 (2004).   

Mechanical Property Characterization for Nanowires

Understanding and predicting the behavior of NEMS (nanoelectromechanical systems) resonators made by assembling template-grown nanowires requires characterization of the elastic modulus and intrinsic damping for such materials. In this work, we present results of resonance measurements using cantilevers made by electroplating clamps which fully enclose one end of nanowires (NWs) made from Si, Rh and Au. Data from 16 such Si NWs made by the VLS (Vapor-Liquid-Solid) technique reveal a typical Q-factor of 5000, a geometric scaling ($\sim $D/L$^{2}$, diameter D, length L) of the frequency consistent with linear elastic beam theory, and a higher value of Young's modulus for single-crystal silicon than reported from experiments with thin-film Si resonators. The low scatter in the modulus data and the high value of Q are both indicative of low clamping losses. Similar-sized wires of polycrystalline Rh and Au made by electroplating, show net damping values (using Q-factor, mass and stiffness) for these materials to be close to each other and roughly 14 times that for silicon.   

Selective epitaxy of III-V semiconductor on Si substrates patterned by diblock copolymer

III-V semiconductors, GaAs and InAs, were grown on Si substrates using molecular beam epitaxy. Si substrates were patterned with SiO$_{2}$ using thin films of diblock copolymer, PS-$b$-PMMA. Using a thin film of a random P(S-r-MMA) copolymer to balance interfacial interactions, spin coated film of PS-b-PMMA, having cylindrical microdomains, were annealed 170$^{o}$C to orient the microdomais normal to the surface.[ P. Mansky et al, Science, 275, 1997 (1458)] After removal of the PMMA cylinders, RIE was used to transfer the copolymer template to the substrate yielding a hexagonal array of $\sim $20 nm pores in the substrate. GaAs and InAs were selectively filled in pores. Images from scanning electron microscopy show that GaAs and InAs quantum dots with density of 8$\times $10$^{10}$ cm$^{-2}$ and diameter of 30nm were achieved by selective epitaxy. This provides the possibility of patterning of nanostructures for integration of III-V materials on Si and offers new potentials for electronic and optoelectronic applications based on regular or homogeneous structures.