Assessing the Impact of Fabrication Variations on Josephson Travelling Wave Parametric Amplifiers

Josephson junction-based travelling wave parametric amplifiers (JTWPAs) are widely used in cQED experiments for high-fidelity readout of superconducting qubits over a large bandwidth. The bandwidth results from a transmission line configuration with thousands of Josephson junctions. However, achieving high gain in such a device necessitates multi-layer structures over a large footprint. As a result, the performance can be impacted by the non-uniformity inherent in the fabrication process.

In this work, we analyze the superconducting circuit performance in the presence of fabrication variations to predict the process constraints needed to enable the high reproducibility of micro- and nanostructured components in the JTWPA fabricated on an all-Aluminium qubit-compatible process. We show systematic improvements in device performance from the refinement of Josephson junction fabrication treatments for yield and uniformity. We compare measurements on fabricated devices and correlate the effects of mismatched cell impedance and signal reflections between cells to the parameter spread in fabrication runs. Subsequently, we model cell-to-cell variations of circuit parameters and evaluate the impact of non-uniformity on the gain, quantum efficiency, return loss, and insertion loss. Finally, we combine experimental data and simulations to obtain gain scaling from the relative standard deviation of process parameters.

 

*This work was funded in part by the AWS Center for Quantum Computing