Session G56: Scaling Trapped Ion Quantum Computers - Methods and Technologies

Trap-integrated technologies for scalable trapped-ion quantum information processing

Realizing the promise of trapped-ion quantum information processing requires maintaining the high coherence, exquisite control, and high-fidelity operations obtained in the currently most functional small- and medium-scale experiments while developing systems containing considerably more individually controlled ion qubits.  Achieving this balance is a challenge that may benefit from integration of control technologies that can increase robustness and operation precision when manipulating arrays of ions.  The amount and types of integration pursued will have impacts on development cycle time and ultimate capabilities, and so must be considered at each scale.  Additionally, there is an interplay between processor architecture and required hardware integration, and the amount of tight integration may be architecture-specific at some scales.  A promising platform for the integration of several relevant technologies at larger scales is based on established micro- and nano-fabrication processes, which provide devices with unsurpassed reproducibility, alignment precision, and electronic and photonic capabilities at the chip level.  I will describe a platform utilizing such processes for monolithic integration of trap electrodes and optical components for ion-qubit control and readout.  Heterogeneous or hybrid integration of electronics may be employed as part of this platform to provide low-latency control while avoiding control-signal routing challenges.  Near-term challenges include determining which integrated devices and integration methods are most beneficial for architectures of interest, while keeping track of potential deleterious effects that can limit quantum logic speed and fidelity.  Current research is in the simultaneous development and evaluation of the ion platform in light of these considerations.   

Design, fabrication, and validation of junction ion traps

We summarize Quantinuum's progress in research and development of surface-electrode ion traps for QCCD quantum computing architectures. A common feature of experimental ion traps to date is that the number of independent control signals is proportional to the number of trapping legs, which is turn is proportional to the number of ions in the trap. In scaling such devices to thousands or millions of ions, the system requires a similar number of waveform generators, chip interconnects, vacuum feedthroughs, bandpass filters, and so on. Here we propose an architecture in which the number of analog control signals is completely independent of the number of legs in the trap. We describe the design of an ion trap composed of a 5x8 array of trapping zones and experimentally demonstrate the required motional primitives to support this architecture.   

Quantum Control and Quantum Error Correction in Trapped Ion Quantum Computers

Hyperfine trapped ion qubits are nearly ideal qubits. The qubit performance is primarily limited by the quality of the gates due to imperfections in the experimental control fields. I will present our work on characterizing and minimizing these imperfections using quantum control with an emphasis on two-qubit gates and quantum circuit designs. I will then discuss how these control methods improve the performance of quantum error correction protocols.   

Trap-integrated qubit control and readout elements for scaling trapped ion quantum computers

The integration of qubit control and readout elements into microfabricated surface-electrode ion traps offers potential advantages for scaling to larger trapped-ion systems. I will describe two efforts in this direction from our group. The first is the implementation of trap-integrated superconducting photon detectors to detect qubit-state-dependent ion fluorescence for qubit readout. The newest generation of integrated detectors are electrically shielded from trapping rf, enabling operation in a fully functional trap at temperatures up to 6 K, and should be suitable for high-fidelity readout of trapped Ca⁺ ions. The second effort is the implementation of high-fidelity single-qubit and two-qubit gates driven by magnetic fields and magnetic field gradients generated from trap-integrated current-carrying electrodes. This technique should enable a single set of applied control currents to carry out high-fidelity qubit manipulations simultaneously, in an individually-addressable manner, across many different trap zones in a scaled-up multi-zone ion trap processor. We envision these two efforts combining to enable a mixed-species “gradient quantum logic isolated qubit” architecture for fully-integrated trapped ion quantum computers. We pair an entirely laser-free “data” species (here ²⁵Mg⁺), which encodes quantum information in hyperfine states, with a co-trapped auxiliary “helper” species (here ⁴⁰Ca⁺) that provides sympathetic cooling and quantum-logic-based state preparation/readout of the data ions. Only low-power resonant lasers are required for the helper species, making the architecture compatible with trap-integrated waveguides for laser light delivery across many trap zones. Helper ion readout is accomplished with trap-integrated photon detectors. All operations on the data ions, and some on the helper ions, are driven using magnetic fields and magnetic field gradients generated by currents in the trap electrodes rather than laser beams. This architecture eliminates memory errors/readout crosstalk from stray data qubit laser light and offers the potential for extremely low data qubit SPAM errors.