Suppressing leakage in sub-10-ns single-qubit gates using heuristic pulse shape engineering*

Leakage errors are one of the dominant sources of gate errors in superconducting quantum processors utilizing low-anharmonicity qubits, such as transmons. When reducing the gate duration to minimize incoherent errors, the leakage errors rapidly increase due to an increased spectral width associated with short control pulses. Here, we propose and demonstrate a new method for engineering control pulse shapes to suppress leakage errors in single-qubit gates. The proposed method provides a closed-form solution for the pulse shape avoiding the need for time-consuming experimental closed-loop optimization. Using a transmon with an anharmonicity of -212 MHz, we experimentally demonstrate the implementation of X90 gates with an error per gate below 2.0×10^-4 enabled by a low leakage error below 3×10^-5 for gate durations down to 6.3 ns. For comparison, we find that the leakage error associated with the conventional cosine DRAG pulse is almost 20 times higher for a gate duration of 6.3 ns, and it decreases below 3×10^-5 only for gate durations above 9.5 ns.