Characterisation of a 3D-integrated 16-qubit superconducting circuit*

Scaling up superconducting circuits can decrease device performance due to fabrication complexity reducing yield and making frequency targeting more challenging [1], and the introduction of spurious modes in larger device enclosures [2]. High coherence and low crosstalk were recently shown in an uncoupled 4-qubit prototype of a tileable 3D-integrated circuit architecture [3] which should maintain performance at larger scale due to the simple tileable design and the use of off-chip inductive shunting to remove spurious enclosure modes.

Here we present measurements of a larger scale version of this circuit, with 16 uncoupled qubits. Average coherence times across the device are T₁ ≈ 54 us and T₂^* ≈ 42 us and average single qubit gate fidelity is 99.93%, close to the coherence limit of 99.94%. By Stark-shifting neighbouring qubits into resonance we are able to measure low residual nearest-neighbour couplings of J ~ 8 kHz, with even lower coupling for diagonally separated qubits, confirming the low crosstalk intrinsic to the design.

 

[1] J M Kreikebaum et al., Supercond. Sci. Technol. 33 (2020)

[2] P. A. Spring et al., Phys. Rev. Appl. 14, 24061 (2020)

[3] P. A. Spring et al., Sci. Adv. 8, (2022)