Performance of Robust, High-Order Dynamical Decoupling Sequences on Superconducting Quantum Hardware*

The performance of today’s quantum hardware is limited by circuit depth and duration due to gate infidelity and decoherence, which adversely constrains the class of experiments achievable without error mitigation. Dynamical decoupling is an error-suppression technique that utilizes carefully timed sequences of pulses inserted during idle operation in order to cancel unwanted interactions with the environment, often allowing higher fidelity circuits to be run. A wide variety of dynamical decoupling sequences exists, ranging from simple first-order protection with uniform pulse intervals to robust, higher-order protection with non-uniform pulse interval sequences. Here, we explore and compare the performance of these various sequences on the Rigetti Aspen-M series of superconducting qubit chips. From this experimental data, we draw conclusions about the relative performance of various dynamical decoupling sequences and offer prognoses about near-term algorithmic capabilities enabled by the improvement in performance, paving the way toward performing deeper circuits with built-in environmental noise protection.