A 3-tier stack for 3D integration of superconducting quantum systems – part 2: qubit design and performance*

A key goal of any extensible architecture for quantum information processing is to enhance connectivity and functionality while preserving qubit coherence. We describe the design and operation of high-coherence superconducting qubits in a 3D-integrated 3-tier stack that utilizes an interposer with superconducting through-silicon vias (TSVs) to connect qubits to multi-level superconducting routing while preserving qubit performance by isolating qubits from lossy dielectrics in the routing tier. Fabrication processes that produce high-coherence qubits are used on both the qubit and interposer tiers. Readout and control circuitry, including resonators and qubit control lines, are located on the interposer tier. All components are accessed using TSVs in the interposer tier and bump bonds between the tiers.