Chip-Integrated Vortex-Braiding*

Superconducting vortices, in p-wave superconductors, may host non-Abelian Majorana zero-modes. Braiding manipulations of such vortices are considered as “operations” in fault-tolerant quantum computation protocols. Here we present a vortex-control circuit, based on Nb superconducting loops residing below a superconducting flake. Imaging vortices using SQUID-on-Tip (SOT) microscopy demonstrates that well-placed Nb loops can position vortiecies along designated axes with 40nm precision, and ; they can shuttle vortices reliably within a 3 μm range.. Finally, we demonstrate a braiding operation where the system is initialized with two vortices, manipulated to revolve around each other and return to their original positions.