Robustness of Dolan-bridge and Manhattan-style Josephson junctions in through-silicon via integrated substrates*

Vertical input-output routing of signals using metallized through-silicon vias (TSVs) is a promising path to scaling monolithic superconducting quantum processors. Bridgeless (i.e., Manhattan) junctions have been believed to be less sensitive to resist height variations compared to Niemeyer-Dolan bridge junctions, therefore benefiting frequency targeting of qubits in the presence of TSVs.  We compared the performance of Manhattan and Dolan-style variants of Josephson junctions fabricated on TSV-integrated substrates. The residual standard deviation of junction resistances is 30% lower on average for Manhattan-style junctions than Dolan-bridge junctions at the intra-die level in the TSV layout. The number of defective junctions (opens and shorts) is one order of magnitude lower in Manhattan-style junctions. Comparison of resistance of identically patterned junctions between planar and TSV dies shows a near doubling of resistance only for the Dolan-bridge variant in the TSV layout. Ongoing optimization of the resist stack and junction pattern post-processing steps tailored for TSV-integrated substrates may further narrow the resistance spread of Manhattan-style junctions.