ASIC Readout System for use with a Silicon Detector Array (SAND)*

Silicon (Si) detectors are widely used throughout the scientific community, particularly in nuclear physics. Modern versions of Si detectors are getting larger and increasingly segmented, requiring many electronic channels to process the signals. NIM and VME modules have traditionally been used to process signals from various types of detectors. Applying this traditional method to a large array of Si-detectors, segmented or otherwise, would be very expensive and in most cases highly impractical. To handle this high density of signals from state-of-the-art Si detector arrays we have explored an Application Specific Integrated Circuit (ASIC) approach in collaboration with University of Washington in St. Louis. This involves ASIC chips developed for simultaneous signal processing with charge sensitive preamplifiers, shaping amplifiers, and constant fraction discriminators built in for 16 channels. One ASIC box is capable of housing 32 of these chips and thus processing signals directly from detectors through a total of 512 channels. Analog energy and timing signals are digitized through a pipeline ADC for the NSCL DAQ software to readout. I was a part of the ND effort to implement such an ASIC system. I conducted energy and timing calibrations as well as linearity, threshold, and resolution tests on the system. In collaboration with Indiana University at Bloomington the ASIC system will be applied to a silicon detector array (SAND) at ND for the study of nuclear astrophysics.