Bulletin of the American Physical Society
APS March Meeting 2018
Volume 63, Number 1
Monday–Friday, March 5–9, 2018; Los Angeles, California
Session L15: Moore's Law: More and BeyondFocus
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Sponsoring Units: FIAP Chair: Stefan Zollner, New Mexico State University Room: LACC 304C |
Wednesday, March 7, 2018 11:15AM - 11:27AM |
L15.00001: Pursuing the critical dimension in etched patterns using X-ray scattering Guillaume Freychet, Dinesh Kumar, Alexander Hexemer, Ronald Pandolfi As the lithographically manufactured nanostructures are shrinking in size, conventional techniques, such as microscopies (SEM, AFM) reach their resolution limits. The Critical Dimension Small-Angle X-ray Scattering (CD-SAXS) has emerged as a promising technique to extract the profile of line gratings. With the advent of high brightness sources and fast detectors, there is a possibility for combining fast X-ray acquisition with high-speed data treatment to reach the timescale for an effective in-line characterization method. |
Wednesday, March 7, 2018 11:27AM - 11:39AM |
L15.00002: Atomic Calligraphy, A Fab-on-a-Chip Approach to Lithography Lawrence Barrett, Richard Lally, Jeremy Reeves, Thomas Stark, David Bishop The traditional approach to keeping pace with Moore's Law has largely been improving conventional semiconductor foundry technology. Here we present an alternative approach called Fab-On-a-Chip where conventional foundry machines are used to create nano-fabrication machines, including deposition, sensing, and lithography tools. Chip based versions of all these tools will be touched on, but the focus of the talk will be a lithography technique called atomic calligraphy. Atomic calligraphy uses MEMS based nano-positioners to move a plate with potentially sub-nanometer resolution. Single apertures, arrays of apertures, or complex designs can be milled into the plate and used to mask depositions. Though serial, atomic calligraphy can achieving large throughputs because it can be scaled to tens of thousands of devices fabricating in parallel. We will show examples of nanoscale structures made with atomic calligraphy including arrays of structures and structures covering a large area. We will also discuss methods used to prevent the clogging of apertures, to push the resolution limits to sub-nanometer, and to array devices to achieve large throughput. |
Wednesday, March 7, 2018 11:39AM - 11:51AM |
L15.00003: Spirothiopyran based photoresists for large area sub-diffraction nanopatterning Harikrishnan Vijayamohanan, Edmund Palermo, Chaitanya Ullal Optical interference lithography is an attractive technique to cheaply and rapidly pattern 3D features in polymer photoresists. However, both resolution and feature size obtained are limited by diffraction. In the past few years, STED microscopy inspired lithography schemes using reversibly saturable switching systems have shown the ability to direct-write features well below the diffraction limit using light. However, the high laser intensity required for saturation limits their use to serial writing. |
Wednesday, March 7, 2018 11:51AM - 12:27PM |
L15.00004: Non-von Neumann computing architectures using integrated optical reservoirs Invited Speaker: Stefan Abel Microprocessors following the von Neumann architecture have become extremely powerful over the past decades, largely caused by reducing the size of individual devices and the introduction of new materials. New computational workloads for cognitive data analysis have become increasingly important. Neural networks, which are often used to efficiently solve these workloads, can be mapped into novel, non-von Neumann system architectures with co-integrated memory and processing units to improve the performance of the underlying algorithms. |
Wednesday, March 7, 2018 12:27PM - 12:39PM |
L15.00005: First principles study of the linear electro-optical response in strained SrTiO3 Ali Hamze, Alexander Demkov The electro-optical (EO) effect in transition metal oxides such as LiNbO3 is widely used in optical modulators used in telecommunications. Recent reports pf the EO effect in BaTiO3 thin films integrated on Si opens a possibility of creating active devices for Si photonics. The integration on Si is achived through a SrTiO3 (STO) buffer layer. Like Si, STO is centrosymmetric, and therefore does not have a linear EO response. However, a polar phase can be stabilized by epitaxial strain. We present the results of densifty functional theory studies of the EO (Pockels) tensor in strained STO. The EO response is calculated for strains ranging from -2.0% to 2.0%. Under 1.0% tensile strain, the EO response is significant, with the largest components of the EO tensor reaching peak values of r111 = r222 = 505.64 pm/V. Under 1.2% compressive strain, the EO tensor has a similarly large peak of r333 = 236.55 pm/V. These peaks in the EO response are associated with the softening of certain phonon modes as a function of strain. Our results suggest that STO grown on a properly chosen substrate can yield a very large EO response, comparable to that of BaTiO3 thin films, which is among the largest known thin-film EO responses. |
Wednesday, March 7, 2018 12:39PM - 12:51PM |
L15.00006: Temperature dependence of the dielectric function and analysis of critical point parameters of bulk Ge Carola Emminger, Nuwanjula Samarasingha Arachchige, Farzin Abadizaman, Nalin Fernando, Stefan Zollner Detailed knowledge of the optical properties of Ge is of great importance for the development of Ge technology. We investigate the effect of temperature on the dielectric function (DF) and interband critical points (CPs) of bulk Ge in the spectral range of 0.5 to 6.3 eV in 10 meV steps. Using spectroscopic ellipsometry at an incident angle of 70° and a UHV cryostat we took a series of measurements at different temperatures between 10 and 738 K. For the investigation of the E0 and E0+Δ0 CPs at 10 K we chose step sizes of 0.5 and 1 meV to resolve their structures. To measure the DF accurately, we performed an ultrasonic and an ozone clean to achieve a stable and thin native GeO2 layer. The thickness is found to be 11 Å at 300 K. |
Wednesday, March 7, 2018 12:51PM - 1:03PM |
L15.00007: Ellipsometry Analysis of Germanium-on-Insulator Wafers Rigo Carrasco, Nuwanjula Samarasingha Arachchige, Bich-Yen Nguyen, Stefan Zollner Germanium based photonic devices attract a lot of interest due to the fact that its band structure is easily influenced by strain and alloying with tin. Utilizing a germanium-on-insulator (GOI) substrate is a key feature for future silicon compatible germanium based devices, allowing for easier integration by the microelectronics industry. |
Wednesday, March 7, 2018 1:03PM - 1:39PM |
L15.00008: TBD Invited Speaker: Ray Chen This abstract not available. |
Wednesday, March 7, 2018 1:39PM - 1:51PM |
L15.00009: Floating gate memory based on ion-insertion electrodes for low-voltage analog computing Elliot Fuller, Scott Keene, Zhongrui Wang, Sapan Agarwal, Francois Leonard, Yang Joshua, Matthew Marinella, Alberto Salleo, Albert Talin A major barrier to realizing neuromorphic hardware is development of analog memory with the programmability and the energy efficiency to compete with conventional hardware. On one hand, CMOS-based floating gate memory (FGM) such as NAND Flash has large programming voltages (>8V) that limits array-level energy efficiency. On the other hand, memristors suffer from non-linear resistance levels and device variability that limit neural network accuracy. To overcome these challenges, we introduce ionic floating-gate memory (IFG). Similar to FGM, IFG is programmed via voltage pulses to a control gate which modulates the doping of a semiconducting channel. However, unlike CMOS, which relies on hot carrier injection or tunneling through an oxide, IFG relies on ion-exchange through a solid electrolyte. Resistance switching occurs as ions are inserted into the channel from the floating gate. The use of a diffusive memristor as the control gate allows for programming pulses < 500 mV, while maintaining the retention required for learning. In addition, the devices can be tuned to >100 resistance levels with a linear response ideal for neural algorithms. Neural network simulations of the device performance are found to reach ideal accuracy when classifying MNIST hand-written digits. |
Wednesday, March 7, 2018 1:51PM - 2:03PM |
L15.00010: The Influence of Passivation Layer Thickness on Radiation Hardness of ZnO Thin Film Transistors Subjected to Proton Irradiation. Kosala Yapabandara, Vahid Mirkhani, Shiqiang Wang, Min Khanal, Sunil Uprety, Tamara Isaacs-Smith, Michael Hamilton, Minseo Park We have investigated the effect of passivation layer thickness on the radiation hardness of ZnO thin film transistors (TFTs). ZnO TFTs with three different passivation layer thicknesses were prepared to obtain the maximum proton distribution in either the ZnO channel layer, ZnO/SiO2 interface, or SiO2 dielectric layer. The samples were irradiated using a 200 keV proton beam with the fluence of 1×1014 protons/cm2. The depth distribution of the non-ionizing energy loss (NIEL) calculated by TRIM simulation data has shown a significant variation along the depth of these three samples. The sample with maximum proton distribution within the ZnO layer showed negligible degradation in device performance compared to unirradiated devices. However, devices with the maximum of proton distribution at either the ZnO/SiO2 interface or in the SiO2 dielectric layer exhibited larger degradation in device characteristics after proton irradiation. Therefore, we observe that caution should be exercised when studying the radiation hardness of proton-irradiated ZnO TFTs since variation in thickness of the passivation layer can result in significantly different device performance after the irradiation. |
Wednesday, March 7, 2018 2:03PM - 2:15PM |
L15.00011: Voltage Controlled Multi-bit Memory and Logic Operation in Manganite Nanostrips Qian Shi, Yang Yu, Hanxuan Lin, Tian Miao, Peng Cai, fengxian jiang, Lifeng Yin, Jian Shen Combining memory and logic functionality in one single device unit is highly attractive in developing next-generation nonvolatile devices. Manganites have been known to respond sensitively to electric field. Using this effect, we fabricate manganite strips with N pairs of side gates to control the total resistivity by side gate voltage. We demonstrate that the total resistivity of the manganite strips can have the 2N different levels by various gate voltage combinations. Logic operations can also be performed in such devices, which are promising for future computing systems beyond von Neumann architecture. |
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