Bulletin of the American Physical Society
APS March Meeting 2016
Volume 61, Number 2
Monday–Friday, March 14–18, 2016; Baltimore, Maryland
Session H12: Beyond STT-MRAM: Future Perspective for Spintronics DevicesIndustry Invited
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Sponsoring Units: FIAP GMAG Chair: Ernesto E. Marinero, Supriyo Datta, Purdue University Room: 308 |
Tuesday, March 15, 2016 2:30PM - 3:06PM |
H12.00001: Magnetic skyrmions : new solitons on the track for future memories and logic applications. Invited Speaker: Vincent Cros Magnetic skyrmions are arguably the smallest topologically non-trivial magnetic configurations [1]. These solitons are nanoscale spin configurations that hold promise as information carriers in ultra-dense memory and logic devices owing to the extremely low threshold currents densities for initiating their dynamics [2]. Up to now however magnetic skyrmions have been observed mostly at very low temperature in a few exotic materials and ultra-thin films. Here, I will illustrate the wealth of skyrmions with some our recent experimental and numerical results stabilized at room temperature in magnetic multilayers due to interfacial chiral interaction. This discovery of stable sub-100 nm individual skyrmions at room temperature [3,4] in a technologically relevant material opens the way for the development of several concepts of skyrmion based memory devices going from race-track memory type to MRAMS, rf devices, logic gates, transistors. [1] Bogdanov, A. N. and Roessler, U. K. Phys. Rev. Lett. 87, 037203 (2001). ; [2] N. Nagaosa, Y. Tokura, Nature Nanotech. 8, 899 (2013), [3] J. Sampaio, et al, Nat. Nanotech. 8, 839 (2013). ; [4] C. Moreau-Luchaire et al, arXiv: 1502.07853. ---- Authors : V. Cros1, C. Moreau-Luchaire1, C. Moutafis2,3, N. Reyren1, J. Sampaio1,5, C.A.F. Vaz2, P. Warnicke2, D. Maccariello1, N. Vanhorne1, F. Garcia-Sanchez3, K. Bouzehouane1, K. Garcia1, C. Deranlot1, S. Rohart4, J.M. George1, J. Raabe2, J.V. Kim3, A. Thiaville4, A. Fert1 1 Unit\'{e} Mixte de Physique CNRS Thales, Univ. Paris-Sud, Universit\'{e} Paris-Saclay, Palaiseau, France 2 Swiss Light Source, Paul Scherrer Institute, Villigen,Switzerland 3 School of Computer Science, University of Manchester, Manchester, UK 4Institut d'Electronique Fondamentale, Univ. Paris-Sud, CNRS, Orsay, France 5Lab. de Physique des Solides, CNRS, Univ. Paris-Sud, Orsay, France ---- Acknowledgements : ANR ULTRASKY and EU grant MAGicSky No. FET-Open-665095 are acknowledged for financial support. [Preview Abstract] |
Tuesday, March 15, 2016 3:06PM - 3:42PM |
H12.00002: Novel spintronics devices for memory and logic: prospects and challenges for room temperature all spin computing, Invited Speaker: Jian-Ping Wang An energy efficient memory and logic device for the post-CMOS era has been the goal of a variety of research fields. The limits of scaling, which we expect to reach by the year 2025, demand that future advances in computational power will not be realized from ever-shrinking device sizes, but rather by innovative designs and new materials and physics. Magnetoresistive based devices have been a promising candidate for future integrated magnetic computation because of its unique non-volatility and functionalities. The application of perpendicular magnetic anisotropy for potential STT-RAM application was demonstrated and later has been intensively investigated by both academia and industry groups, but there is no clear path way how scaling will eventually work for both memory and logic applications. One of main reasons is that there is no demonstrated material stack candidate that could lead to a scaling scheme down to sub 10 nm. Another challenge for the usage of magnetoresistive based devices for logic application is its available switching speed and writing energy. Although a good progress has been made to demonstrate the fast switching of a thermally stable magnetic tunnel junction (MTJ) down to 165 ps, it is still several times slower than its CMOS counterpart. In this talk, I will review the recent progress by my research group and my C-SPIN colleagues, then discuss the opportunities, challenges and some potential path ways for magnetoresitive based devices for memory and logic applications and their integration for room temperature all spin computing system. [Preview Abstract] |
Tuesday, March 15, 2016 3:42PM - 4:18PM |
H12.00003: In Search of New Spintronic Devices Using the Modular Approach Invited Speaker: Kerem Yunus Camsari There has been enormous progress in the last two decades, effectively combining spintronics and magnetics into a powerful force that is shaping the field of memory devices. At the same time, new materials and phenomena continue to be discovered at a very fast pace, providing an ever-increasing set of building blocks that could be exploited in designing functional devices of the future. \newline \newline Through careful benchmarking against available theory and experiment we recently established a set of ``elemental'' circuit modules representing a diverse range of materials and phenomena [1], which are continually updated [2]. We will first show how these elemental modules can be integrated seamlessly to model both spintronic transport and nanomagnetic dynamics, starting from basic spin-valves and extending to complex experimental structures. \newline \newline We will then show how this framework can be used to design transistor-like spintronic devices to provide novel functionality compared to a standard complementary metal oxide semiconductor (CMOS) device. This approach allows us to incorporate the detailed physics of diverse sophisticated phenomena accurately into detailed circuit-level simulations to provide reliable estimates for the switching energy and delay of carefully designed devices. \newline \newline [1] K.Camsari et al., Scientific Reports, 5, 10571 (2015) \newline [2] https://nanohub.org/groups/spintronics [Preview Abstract] |
Tuesday, March 15, 2016 4:18PM - 4:54PM |
H12.00004: Spin Orbit Interaction Engineering for beyond Spin Transfer Torque memory Invited Speaker: Kang L. Wang Spin transfer torque memory uses electron current to transfer the spin torque of electrons to switch a magnetic free layer. This talk will address an alternative approach to energy efficient non-volatile spintronics through engineering of spin orbit interaction (SOC) and the use of spin orbit torque (SOT) by the use of electric field to improve further the energy efficiency of switching. I will first discuss the engineering of interface SOC, which results in the electric field control of magnetic moment or magneto-electric (ME) effect. Magnetic memory bits based on this ME effect, referred to as magnetoelectric RAM (MeRAM), is shown to have orders of magnitude lower energy dissipation compared with spin transfer torque memory (STTRAM). Likewise, interests in spin Hall as a result of SOC have led to many advances. Recent demonstrations of magnetization switching induced by in-plane current in heavy metal/ferromagnetic heterostructures have been shown to arise from the large SOC. The large SOC is also shown to give rise to the large SOT. Due to the presence of an intrinsic extraordinarily strong SOC and spin-momentum lock, topological insulators (TIs) are expected to be promising candidates for exploring spin-orbit torque (SOT)-related physics. In particular, we will show the magnetization switching in a chromium-doped magnetic TI bilayer heterostructure by charge current. A giant SOT of more than three orders of magnitude larger than those reported in heavy metals is also obtained. This large SOT is shown to come from the spin-momentum locked surface states of TI, which may further lead to innovative low power applications. I will also describe other related physics of SOC at the interface of anti-ferromagnetism/ferromagnetic structure and show the control exchange bias by electric field for high speed memory switching.\\ *The work was in part supported by ERFC-SHINES, NSF, ARO, TANMS, and FAME [Preview Abstract] |
Tuesday, March 15, 2016 4:54PM - 5:30PM |
H12.00005: Rise of Racetrack Memory! Domain Wall Spin-Orbitronics Invited Speaker: Stuart Parkin Memory-storage devices based on the current controlled motion of a series of domain walls (DWs) in magnetic racetracks promise performance and reliability beyond that of conventional magnetic disk drives and solid state storage devices (1). Racetracks that are formed from atomically thin, perpendicularly magnetized nano-wires, interfaced with adjacent metal layers with high spin-orbit coupling, give rise to domain walls that exhibit a chiral N\'{e}el structure (2). These DWs can be moved very efficiently with current via chiral spin-orbit torques (2,3). Record-breaking current-induced DW speeds exceeding 1,000 m/sec are found in synthetic antiferromagnetic structures (3) in which the net magnetization of the DWs is tuned to almost zero, making them ``invisible''. Based on these recent discoveries, Racetrack Memory devices have the potential to operate on picosecond timescales and at densities more than 100 times greater than other memory technologies. (1) S.S.P. Parkin et al., Science 320, 5873 (2008); S.S.P. Parkin and S.-H. Yang, Nat. Nano. 10, 195 (2015). (2) K.-S. Ryu metal. Nat. Nano. 8, 527 (2013). (3) S.-H. Yang, K.-S. Ryu and S.S.P. Parkin, Nat. Nano. 10, 221 (2015). (4). S.S.P. Parkin, Phys. Rev. Lett. 67, 3598 (1991). [Preview Abstract] |
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