Bulletin of the American Physical Society
APS March Meeting 2013
Volume 58, Number 1
Monday–Friday, March 18–22, 2013; Baltimore, Maryland
Session C4: Invited Session: Industrial Physics Forum: Frontiers in Nanomanufacturing |
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Sponsoring Units: FIAP Chair: Robert Celotta, National Institute of Standards and Technology Room: Ballroom IV |
Monday, March 18, 2013 2:30PM - 3:06PM |
C4.00001: Frontiers of Nanomanufacturing: An Overview Invited Speaker: James Liddle Nanomanufacturing in its current state encompasses a huge range of materials, products and processes at different levels of maturity and scale. The common thread uniting these disparate activities is that the cost of the methods used in manufacturing - including metrology - must be consistent with both the price the products command and the size of the available market to be economically viable. In this talk I will give examples of how the complexity of the final product and its value dictate what type of nanomanufacturing approach is appropriate, using semiconductor manufacturing as a baseline against which to compare the production of items such as carbon nanocomposites, nanophotonic structures and DNA constructs. In particular, I will describe the need for and progress towards new metrology techniques that can provide nanoscale information, but do so at rates consistent with the high-volume manufacturing of low-cost products. [Preview Abstract] |
Monday, March 18, 2013 3:06PM - 3:42PM |
C4.00002: New Computing Devices and the Drive toward Nanometer-scale Manufacturing Invited Speaker: Thomas Theis In recent decades, we have become used to the idea of exponentially compounding improvements in manufacturing precision. These improvements are driven in large part by the economic imperative to continuously shrink the devices of information technology, particularly the Complementary Metal Oxide Semiconductor (CMOS) field-effect transistor. However, CMOS technology is clearly approaching some important physical limits. Since roughly 2003, the inability to reduce supply voltages according to constant-field scaling rules, combined with economic constraints on areal power density and total power, has forced designers to limit clock frequencies even as devices have continued to shrink. New channel materials, new device structures, and novel circuits cannot fundamentally alter this new status quo. The device physics must change in a more fundamental way if we are to realize fast digital logic with very low power dissipation. The continued vitality of the information technology revolution and the continued push of manufacturing precision toward nanometer dimensions, will depend on it. Fortunately, there is no shortage of new digital switch concepts based on physical principles which avoid the fundamental voltage-scaling limit of the field-effect transistor. The Nanoelectronics Research Initiative (NRI) is a consortium of leading semiconductor companies established in 2005 to guide and fund fundamental research at U.S. universities with the goal of finding the ``next switch'' to replace the CMOS transistor for storing and manipulating digital information. The National Institute of Standards and Technology (NIST) and the National Science Foundation (NSF) have partnered with NRI to fund this research. To date, NRI has funded the exploration of many novel device concepts, and has guided research comparing the capabilities of these devices. Although no single device has yet emerged as a clear winner with the potential to eclipse the field-effect transistor, results are sufficiently promising that member companies have recently renewed their commitment to NRI. Based on the learning to date, a vision for the next five years of research has emerged. [Preview Abstract] |
Monday, March 18, 2013 3:42PM - 4:18PM |
C4.00003: Atomic-Scale Electronics Invited Speaker: Michelle Simmons Down-scaling has been the leading paradigm of the semiconductor industry since the invention of the first transistor in 1947. However miniaturization will soon reach the ultimate limit, set by the discreteness of matter, leading to intensified research in alternative approaches for creating logic devices. We will present single atom transistors where we can measure both the charge and spin of individual dopants and discuss long term architectures to exploit their unique characteristics. [Preview Abstract] |
Monday, March 18, 2013 4:18PM - 4:54PM |
C4.00004: Nanoscale construction with DNA Invited Speaker: Shawn Douglas The programmability of DNA makes it an attractive material for constructing intricate nanoscale shapes. One method for creating these structures is DNA origami, in which a multiple-kilobase single-stranded ``scaffold'' is folded into a custom nanoscale shape by interacting with hundreds of short oligonucleotide ``staple'' strands. I will talk about our efforts to realize demand-meeting applications of this method, including our recent development of nanoscale devices to mimic cell-signaling stimulation carried out by our own immune systems. [Preview Abstract] |
Monday, March 18, 2013 4:54PM - 5:30PM |
C4.00005: Manufacturing for Terawatt-Scale Energy Applications Invited Speaker: Harry Atwater Future energy conversion devices will make extensive use of nanostructured materials that must be manufactured at a scale compatible with terawatt-scale deployment. Specifically, future ultrahigh efficiency photovoltaic devices and modules will likely have little in common with today's photovoltaic technology but instead will be essentially complex optical integrated circuits with microscale and nanoscale critical dimensions for efficient optical spectrum splitting, light absorption and carrier transport. The challenge for nanomanufacturing is to realize the fabrication of these sophisticated device architectures with nanoscale features in high-volume low-cost commodity fabrication processes. I will describe examples of practical and scalable approaches to large-scale nanophotonic fabrication using recent advances in the research and commercial development. One example is epitaxial liftoff of thin-film single-crystal Si and III--V compound semiconductor absorbers, and layer-transfer printing techniques for single crystal film assembly of lifted film structures. Another is substrate conformable soft-imprint lithography provides a scalable method for the synthesis of low-cost large-area arrays of nano-patterned light-trapping structures or structures with engineered optical density of states. It is now well established that soft-imprint lithography has a deep-subwavelength resolution, maintained over a large area. Directions for future research and applications to other energy technologies will be surveyed. [Preview Abstract] |
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