APS March Meeting 2012
Volume 57, Number 1
Monday–Friday, February 27–March 2 2012;
Boston, Massachusetts
Session V20: Invited Session: High k Dielectrics for High Carrier Mobility Channel Applications
8:00 AM–10:24 AM,
Thursday, March 1, 2012
Room: 253C
Sponsoring
Unit:
FIAP
Chair: Jueinai Kwo, National Tsing Hua University
Abstract ID: BAPS.2012.MAR.V20.2
Abstract: V20.00002 : Pushing the material limit and physics novelty in high $\kappa$'s/high carrier mobility semiconductors for post Si CMOS
8:36 AM–9:12 AM
Preview Abstract
Abstract
Author:
Minghwei Hong
(Department of Physics and Graduate Institute of Applied Physics, National Taiwan University, Taipei, Taiwan 10617)
The semiconductor industry is now facing unprecedented materials/physics
challenges due to the scaling-limitation of Si CMOS transistor arising from
non-scaling of matters, namely gate dielectrics and channel mobility. The
new technology using high-$\kappa $ plus metal gate on high carrier mobility
semiconductors of InGaAs and Ge will lead to faster speed at lower power.
The tasks for realizing the new devices equivalent oxide thickness (EOT) $<$
1 nm, interfacial density of state (D$_{it}) \quad \le $ 10$^{11}$
eV$^{-1}$cm$^{-2}$, self-aligned process, low parasitic, and integration
with Si, have been solved or are being feverishly studied. The key of
achieving the above goals is to understand/tailor interfaces of the high
$\kappa $'s/InGaAs (Ge). Tremendous progress has been made using molecular
beam epitaxy (MBE) and atomic layer deposition (ALD) high $\kappa $'s of
Ga$_{2}$O$_{3}$(Gd$_{2}$O$_{3})$, Al$_{2}$O$_{3}$, and HfO$_{2}$, and the
novel ALD/MBE dual dielectrics in attaining an EOT of 0.5 nm, D$_{it}$ of
low 10$^{11}$ eV$^{-1}$cm$^{-2 }$(with a flat D$_{it}$ distribution versus
energy), and thermal stability at high temperatures higher than 800\r{ }C of
the MOS structures. Electronic/electrical characteristics of the
hetero-structures have been studied using in-situ synchrotron radiation
photo-emission, cross-sectional scanning tunneling spectroscopy, capacitance
(conductance)-voltage under various temperatures, and charge pumping
methods. Device performance in world-record drain currents,
transconductances, sub-threshold swings, etc. in self-aligned
inversion-channel high $\kappa $'s/InGaAs and /Ge MOSFET's will also be presented. This work has been supported by Nano National Program (NSC 100-2120-M-007-010) of the NSC of Taiwan, and the AOARD of the US Air Force.
\\[4pt]
In collaboration with J. Kwo, W. C. Lee, M. L. Huang, T. D. Lin, Y. C. Chang, Y. H. Chang, C. A. Lin, Y. M. Chang (NTHU and NTU in Taiwan), T. W. Pi, C. H. Hsu (NSRRC in Taiwan), Y. P. Chiu (NSYSU in Taiwan), C. Merckling (IMEC in Belgium), J. I. Chyi (NCU, Taiwan), and G. J. Brown (AFRL, USA).
To cite this abstract, use the following reference: http://meetings.aps.org/link/BAPS.2012.MAR.V20.2