Session V30: Nanotechnology Applications: NEMS, CNTs, Graphene, and Nanoscale Devices

8:00 AM–11:00 AM, Thursday, March 18, 2010
Room: D139

Sponsoring Unit: FIAP
Chair: Willi Mickelson, Center for Integrated Nanomechanical Systems, University of California, Berkeley

Abstract ID: BAPS.2010.MAR.V30.9

Abstract: V30.00009 : Experimental Demonstration and Characterization of on-chip high speed graphene interconnects

9:36 AM–9:48 AM

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  Xiangyu Chen
    (Stanford University)

  Deji Akinwande
    (Stanford University)

  KeongJae Lee

  Gael Close
    (Zurich Research Laboratory, IBM Research)

  Shinichi Yasuda
    (Toshiba, Japan)

  Bipul Paul
    (Toshiba America Research)

  Shinobu Fujita
    (Toshiba, Japan)

  Jing Kong

  H.-S. Philip Wong
    (Stanford University)

Graphene has been considered as one of the most promising candidates for future interconnect technology. In spite of the promising theoretical predictions and DC characterization results about the excellent current-carrying capability of graphene nanoribbons, experimental demonstration and characterization of high speed signaling performance of graphene interconnects is still very limited. Here we present the first monolithic integration of graphene with commercial CMOS technology and the first experimental demonstration of on-chip graphene interconnects that operates above 1 GHz. We also studied the the dependence of high frequency performance on graphene interconnect physical dimensions. Important physical parameters like mean free path of graphene are extracted from experimental data. We compared our experimental results with previous theoretical predictions and gave experimental performance projection of on-chip graphene nanoribbon interconnects with linewidth smaller than 100nm.

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