Bulletin of the American Physical Society
APS April Meeting 2016
Volume 61, Number 6
Saturday–Tuesday, April 16–19, 2016; Salt Lake City, Utah
Session S16: LHC Instrumentation II |
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Sponsoring Units: DPF Chair: James Proudfoot, Argonne National Laboratory Room: 251D |
Monday, April 18, 2016 1:30PM - 1:42PM |
S16.00001: Muon reconstruction performance of the ATLAS detector in Run 2 Hannah Herde We will discuss the performance of the improved ATLAS muon reconstruction as measured during the 2015 run of the LHC at $\sqrt{s}=13$ TeV. Dimuon resonances ($J/\psi \rightarrow \mu \mu$ and $Z \rightarrow \mu\mu$) are used to measure reconstruction and isolation efficiencies as well as transverse momentum resolution and momentum scales. Measurements are made in the various detector regions and for muon momenta between 5 and hundreds of GeV. They are all found to be in good agreement with tuned Monte Carlo simulation. [Preview Abstract] |
Monday, April 18, 2016 1:42PM - 1:54PM |
S16.00002: Performance of the new small-strip Thin Gap Chamber for the ATLAS Muon System at the LHC. Alain Bellerive The instantaneous luminosity of the Large Hadron Collider (LHC) at CERN will be increased up to a factor of five with respect to the design value by undergoing an extensive upgrade program. The largest phase-1 upgrade project for the ATLAS Muon System is the replacement of the present first station in the forward region with the so-called New Small Wheel (NSW). The NSW consists of layers of Micromegas and small-strip Thin Gap Chambers (sTGC), both providing trigger and tracking capabilities. The precision reconstruction of tracks requires a spatial resolution of about 100 microns, and the trigger track segments have to be reconstructed with an angular resolution of approximately 1 mrad. The sTGC structure consists of a grid of gold-plated tungsten wires sandwiched between two resistive cathode planes. The precision cathode plane has strips with a 3.2mm pitch for precision readout and the cathode plane on the other side has pads for triggering. The pads are used to produce a 3-out-of-4 coincidence to identify muon tracks in an sTGC quadruplet. A full size sTGC quadruplet has been constructed and equipped with the first prototype of dedicated front-end electronics. The design of the sTGC will be described. The performance of the sTGC quadruplet has been characterized with data collected at the Fermilab and CERN test beam facilities. Spatial resolution and trigger efficiency results will be presented. An overview of the simulation and digitization model of the sTGC will also be summarized. [Preview Abstract] |
Monday, April 18, 2016 1:54PM - 2:06PM |
S16.00003: A Simulation of the Front End Signal Digitization for the ATLAS Muon Spectrometer thin RPC trigger upgrade project. Xiangting Meng, John Chapman, Daniel Levin, Tiesheng Dai, Junjie Zhu, Bing Zhou The ATLAS Muon Spectrometer Phase-I (and Phase-II) upgrade includes the BIS78 muon trigger detector project: two sets of eight very thin Resistive Place Chambers (tRPCs) combined with small Monitored Drift Tube (MDT) chambers in the pseudorapidity region 1\textless \textbar $\eta $\textbar \textless 1.3. The tRPCs will be comprised of triplet readout layer in each of the eta and azimuthal phi coordinates, with about 400 readout strips per layer. The anticipated~hit rate is 100-200 kHz per strip. Digitization of the strip signals will be done by 32-channel CERN HPTDC chips. The HPTDC is a highly configurable ASIC designed by the CERN Microelectronics group. It can work in both trigger and trigger-less modes, be readout in parallel or serially.~ For Phase-I operation, a stringent latency requirement of 43 bunch crossings (1075 ns) is imposed. The latency budget for the front end digitization must be kept to a minimal value, ideally less than 350 ns. We conducted detailed HPTDC latency simulations using the Behavioral Verilog code from the CERN group.~We will report the results of these simulations run for the anticipated~detector operating environment and for various HPTDC configurations. [Preview Abstract] |
Monday, April 18, 2016 2:06PM - 2:18PM |
S16.00004: Thermal imaging QC for silicon strip staves of the ATLAS phase II upgrade Carlos Vergel Infante A new silicon strip detector is part of the phase II upgrade of the ATLAS inner tracker. Light-material carbon fiber honeycomb sandwich staves serve as mechanical support for the strip sensors and readout modules and to move the dissipated heat out of the detector. A cooling pipe inside the stave is embedded in heat-conducting foam that thermally connects the pipe with the readout modules. The staves are required to pass a set of quality control (QC) tests before they are populated with readout modules. One test uses a non-invasive inspection method of infrared (IR) thermal imaging of the heat path while the stave is cooled to around -40$^{\circ}$C at ambient room temperature. Imperfections in the manufacturing, such as the delamination of the stave facing from the foam, will exhibit a different temperature profile compared to a flawless stave. We report on the current status of the thermal imaging QC measurements including a characterization of various contributions to the uncertainties in the temperature reading of the IR camera such as pedestal variations, common-mode noise, vignetting, and statistical fluctuations across the field of view. [Preview Abstract] |
Monday, April 18, 2016 2:18PM - 2:30PM |
S16.00005: ABSTRACT WITHDRAWN |
Monday, April 18, 2016 2:30PM - 2:42PM |
S16.00006: Trigger data serializer chip design and test for the ATLAS forward muon upgrade Reid Pinkham The small-strip Thin-Gap Chambers (sTGC) will be used as both trigger and precision tracking muon detectors for the Phase-I upgrade of the ATLAS forward muon spectrometer. The Trigger Data Serializer (TDS) Application-Specific Integrated Circuit (ASIC) is responsible to prepare trigger data for both sTGC pad and strip detectors, perform pad-strip matching, and serialize the trigger data to circuitry on the rim of the detector. The design is challenging due to stringent requirements on number of input/output pins, low latency, high data transmission speed, low power consumption, and radiation-tolerence. We present our design of the TDS ASIC and characterization of its performance from tests of the prototype we built. [Preview Abstract] |
Monday, April 18, 2016 2:42PM - 2:54PM |
S16.00007: Development of Radiation-Tolerant, Low Mass, High Bandwidth Flexible Printed Circuit Cables for Particle Detection Applications Neil McFadden Design options for meter long flexible printed circuit cables required for low mass ultra-high speed signal transmission in the high radiation environment at the High Luminosity run of the Large Hadron Collider (LHC) are described. Two dielectric materials were considered in this study, Kapton and a Kapton/Teflon mixture. The design geometry is a differential embedded microstrip with nominal 100 $\Omega $ impedance. Minimal mass and maximal radiation hardness are pre-eminent considerations. The long flexible printed circuit cables are characterized in bit error rate tests (BERT), attenuation versus frequency, mechanical response to stress and temperature change, and RLC decomposition. These tests are performed before and after irradiation with 1 MeV neutrons to 2x10$^{\mathrm{16}}$/cm$^{\mathrm{2}}$ and 800 MeV protons to 2x10$^{\mathrm{16}}$ 1 MeV-neq/cm$^{\mathrm{2}}$. A 1.0 m Kapton cable, with bandwidth of 6.22 gigabits per second, 0.03{\%} of a radiation length, and no radiation induced mechanical or electrical degradation is obtained. [Preview Abstract] |
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